PS-702
SAW Based Clock Oscillator
Former Part Number SO-720
PS-702
Description
The PS-702 is a SAW Based Clock Oscillator that achieves low phase noise and very low jitter performance.
The PS-702 is housed in an industry standard 6-Pad leadless ceramic package that is hermetically sealed. Packaging options
include bulk or tape and reel.
Features
•
•
Industry Standard Package, 5.0 x 7.5 x 2.0 mm
ASIC Technology For Ultra Low Jitter
0.100 ps-rms typical across 12 kHz to 20 MHz BW
0.120 ps-rms typical across 50 kHz to 80 MHz BW
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•
•
•
•
•
•
Output Frequencies from 150 MHz to 1 GHz
3.3 V Operation
LV-PECL or LVDS Configuration with Fast Transition Times
Complementary Outputs
Output Disable Feature
Improved Temperature Stability over Standard SAW XO
Product is free of lead and compliant to EC RoHS Directive
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•
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Applications
Reference Clock for Wired and Wireless Products
Description
Standard
1-2-4 Gigabit Fibre Channel
10 Gigabit Fibre Channel
10GbE LAN / WAN
OC-192
SONET / SDH
INCITS 352-2002
INCITS 364-2003
IEEE 802.3ae
ITU-T G.709
GR-253-CORE Issue4
Block Diagram
Vcc
COutput
Output
BAW
SAW
Vc
OD
Gnd
Page1 of 7
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Rev: 08May2009
Performance Specifications
Table 1: Electrical Performance
Parameter
Voltage
2, 3
Current (No Load)
3
Nominal Frequency
1, 2
Frequency Stability
1, 2
(Ordering Option)
Aging
6, 8
Outputs
Mid Level - LVPECL
2, 3
Swing - LVPECL
2, 3
Mid Level - LVDS
2, 3
Swing - LVDS
2, 3
Current
6
Rise Time
5, 6
Fall Time
5, 6
Symmetry
2, 3
Jitter
6, 7
(12 kHz - 20 MHz BW) 622.08 MHz
Jitter
6, 7
(50 kHz - 80 MHz BW) 622.08 MHz
Period Jitter
9
, RMS (622.08 MHz)
Period Jitter
9
, Peak - Peak (622.08 MHz)
Operating Temperature
1
Package Size
1]
2]
3]
4]
5]
6]
7]
8]
9]
Symbol
V
CC
I
CC
Min
Supply
2.97
Frequency
Typical
3.3
55
Maximum
3.63
70
1000
Units
V
mA
MHz
ppm
f
N
f
STAB
150
±50, ±100
10
V
CC
-1.4
450
250
I
OUT
t
R
t
F
SYM
фJ
фJ
фJ
фJ
T
OP
45
50
0.100
0.120
2.5
16
0/70, -20/70 or -40/85
5.0 x 7.5 x 2.0
V
CC
-1.25
600
V
CC
-1.2
450
20
500
500
55
0.250
0.300
3.0
24
V
CC
-1.0
750
ppm
V
mV-pp
V
mV-pp
mA
ps
ps
%
ps-rms
ps-rms
ps-rms
ps pk-pk
°C
mm
See Standard Frequencies and Ordering Information tables (Pg 7) for more specific information
Parameters are tested with production test circuit below (Fig 1).
Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.
Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310.
Measured from 20% to 80% of a full output swing (Fig 2).
Not tested in production, guaranteed by design, verified at qualification.
Integrated across stated bandwidth per GR-253-CORE Issue4.
Tested with Vc = 0.3V to 3.0V unless otherwise stated in part description
Broadband Period Jitter measured using Lecroy Wavemaster 8600A 6 GHz Oscilloscope, 250K samples taken
Enable, Disable
(-1.3V, +2.0V)
1
6
(+2.0V)
t
R
COutput
t
F
No connect
2
5
V
OH
50%
V
OL
(-1.3V)
3
4
50
Ω
Output
50
Ω
On Time
Test Circuit Notes:
1) To Permit 50
Ω
Measurement of Outputs, all DC Inputs are Biased Down 1.3V.
2) All Voltage Sources Contain Bypass Capacitors to Minimize Supply Noise.
3) 50
Ω
Terminations are Within Test Equipment.
Period
Fig 1: Test Circuit
Fig 2: LV-PECL Waveform
Page2 of 7
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Rev: 08May2009
Absolute Maximum Ratings
Parameter
Power Supply
Output Current
Storage Temperature
Soldering Temp/Time
Symbol
V
CC
I
OUT
TS
T
LS
Ratings
0 to 4
25
-55 to 125
260 / 40
Unit
V
mA
°C
°C / sec
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied
at these or any other conditions in excess of conditions represented in the operational sections of this datasheet. Exposure to
absolute maximum ratings for extended periods may adversely affect device reliability. Permanent damage is also possible if OD
or Vc is applied before Vcc.
Suggested Output Load Configurations
+3.3V
0.10
μ
F
0.01
μ
F
0.10
μ
F
0.01
μ
F
+3.3V
+3.3V
150
Ω
150
Ω
OD
N/C
Gnd
1
2
3
6
5
4
Vcc
COutput
Output
Z = 50
Ω
Z = 50
Ω
100
Ω
OD
N/C
Gnd
1
2
3
6
5
4
Vcc
COutput
Output
Z = 50
Ω
Z = 50
Ω
40
Ω
40
Ω
49
Ω
49
Ω
240
Ω
240
Ω
LV-PECL to LV-PECL:
For short transmission lengths, the power
consumption could be reduced by removing the 100
Ω
resistor and
doubling the value of the pull down resistors.
LV-PECL to LVDS:
Restricted for short transmission lengths.
Configuration may require modification depending on LVDS receiver.
+3.3V
0.10
μ
F
0.01
μ
F
0.10
μ
F
0.01
μ
F
+2.0V
OD
N/C
Gnd
1
2
3
6
5
4
Vcc
COutput
Output
0.01
μ
F
0.01
μ
F
OD
N/C
-1.3V
1
2
3
6
5
4
Vcc
COutput
Output
240
Ω
240
Ω
Functional Test:
Allows standard power supply configuration.
Since AC coupled, the LV-PECL levels cannot be measured.
Production Test:
Allows direct DC coupling into 50
Ω
measurement
equipment. Must bias the power supplys as shown. Similar to Figure 1.
Page3 of 7
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Rev: 08May2009
Typical Characteristics - Phase Noise
PS-702-ECE-GAAN-622M080000
Page4 of 7
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Rev: 08May2009
Reliability
VI qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and IR reflow
simulation. The PS-702 family is capable of meeting the following qualification tests:
Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Solderability
Gross and Fine Leak
Resistance to Solvents
Conditions
MIL-STD-883, Method 2002
MIL-STD-883, Method 2007
MIL-STD-883, Method 2003
MIL-STD-883, Method 1014
MIL-STD-883, Method 2016
Handling Precautions
Although ESD protection circuitry has been designed into the PS-702 proper precautions should be taken when handling and
mounting. VI employs a human body model (HBM) and a charged device model (CDM) for ESD susceptibility testing and design
protection evaluation.
ESD Ratings
Model
Human Body Model
Man Man Model
Minimum
1500V
200V
Conditions
MIL-STD-883, Method 3015
V/JESD22-A115-A
Reflow Profile (IPC/JEDEC J-STD-020C)
Parameter
PreHeat Time
Ramp Up
Time Above 217 °C
Time To Peak Temperature
Time at 260 °C
Ramp Down
Symbol
t
S
R
UP
t
L
T
AMB-P
t
P
R
DN
Value
60 sec Min, 180 sec Max
3 °C/sec Max
60 sec Min, 150 sec Max
480 sec Max
20 sec Min, 40 sec Max
6 °C/sec Max
The device is qualified to meet the JEDEC standard for
Pb-Free assembly. The temperatures and time intervals
listed are based on the Pb-Free small body requirements.
The PS-702 device is hermetically sealed so an aqueous
wash is not an issue.
Termination Plating:
Electroless Gold Plate over Nickel Plate
Page5 of 7
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Rev: 08May2009
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