CXA2610N
Laser Driver
Description
The CXA2610N is a laser driver IC for optical discs.
This IC supports higher optical power output speeds.
Features
•
LD driver with excellent driving capability
•
Write current of 250mA (max.) possible by setting
the IIN2 (Pin 2) and IIN3 (Pin 5) external resistors
•
Rise time
≈
3ns
•
Fall time
≈
4ns
•
The oscillation frequency of the built-in oscillation
circuit can be set from 100 to 600MHz by
connecting the OSCFR (Pin 4) external resistor to
GND.
•
The oscillator amplitude initial value of the built-in
oscillation circuit can be set by connecting the
OSCGA (Pin 12) external resistor to GND, and the
oscillator amplitude can be adjusted by the IINR
input current value.
•
Oscillation ON/OFF can be set as desired.
•
Single +5V power supply
•
TTL/CMOS control for control system
Applications
•
CD-R driver
•
CD-RW driver
•
DVD driver
•
Writable optical driver
•
Laser diode current switching
Structure
Bipolar silicon monolithic IC
16 pin SSOP (Plastic)
Absolute Maximum Ratings
•
Supply voltage
Vcc
•
Operating temperature
•
Storage temperature
Operating Conditions
Supply voltage
5.5
V
°C
°C
Topr –10 to +70
Tstg –65 to +150
4.5 to 5.5
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E99320-PS
CXA2610N
Block Diagram
IINR
IIN2
GND
OSCFR
IIN3
CONTR
CONT2
CONT3
1
2
3
4
5
6
7
8
V-I
V-I
Current
SW
Driver
16
Vcc
15
Vcc
14
LD0
13
GND
V-I
OSC
12
OSCGA
11
ENABLE
TTL
10
OSCENA
9
Vcc
Pin Description
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
IINR
IIN2
GND
OSCFR
IIN3
CONTR
CONT2
CONT3
Vcc
OSCENA
ENABLE
OSCGA
GND
LD0
Vcc
Vcc
I/O
I
I
—
I
I
I
I
I
—
I
I
I
—
O
—
—
Oscillation level adjustment.
LD drive current setting input.
Ground.
Oscillation frequency adjustment.
LD drive current setting input.
LD drive current output setting.
LD drive current output setting.
LD drive current output setting.
V
CC
.
Oscillation ON for read/forced oscillation ON control.
LD drive current ON/OFF control. (High: ON, Low: OFF)
Oscillation level initial value setting.
Ground.
LD anode side connection.
V
CC
.
V
CC
.
Description
–2–
Electrical Characteristics
Control status
Measurement condition and method
CONTR CONT2
2.0
35
55
78
2.0
2.0
35
50
Current consumption when CONTR = Low for I
CC
2 (OSC: ON)
—
Pin voltage measurement
Pin voltage measurement
1.3
2.0
Output current for IIN2 pin input 5V
Output current for IIN3 pin input 5V
1.3
2.0
1.3
Current gain measurement for IINR (∆I
OUT
/∆I
IN
)
Current gain measurement for IIN2 (∆I
OUT
/∆I
IN
)
Current gain measurement for IIN3 (∆I
OUT
/∆I
IN
)
2.0
1.3
2.0
Output current for IINR pin input 5V
—
—
2.0
2.0
1.3
2.0
1.3
2.0
2.0
1.3
2.0
—
1.3
—
—
1.3
2.0
Current consumption for IINR input voltage where oscillation level =
47mAp-p
2.0
1.3
20
OSC: L (write mode). LD: OFF
2.0
1.3
CONT3 OSCENA ENABLE
52
75
105
1.21 1.257 1.3
80
103 120
115 125 145
145 157 175
145 163 175
95
104 115
120 133 145
120 136 145
mA
mA
mA
V
mV
mA
mA
mA
—
—
—
Min. Typ. Max.
Unit
(Ta = 25°C, Vcc = 5V)
Measure-
ment No.
Measurement item
Symbol
1
Current consumption 1
I
CC
1
2
Current consumption 2
I
CC
2
3
Current consumption 3
I
CC
3
4
Pin voltage 1
VFR
5
Pin voltage 2
VLE
6
Output drive current
I
OUT
1
7
Output drive current
I
OUT
2
8
Output drive current
I
OUT
3
9
Input/output current gain
I
GAIN
1
10
Input/output current gain
I
GAIN
2
–3–
1.3
L
→
H
H
→
L
2.0
H
→
L
1.3
2.0
2.0
1.3
L
→
H
H
→
L
1.3
2.0
2.0
2.0
1.3
H
→
L
H
→
L
2.0
2.0
2.0
Oscillation frequency
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
11
Input/output current gain
I
GAIN
3
AC items
I
OUT
= 40mA (CONTR) + 40mA (CONT2), settling 10 to 90%
I
OUT
= 40mA (CONTR) + 40mA (CONT2), settling 10 to 90%
I
OUT
= 40mA (CONTR) + 40mA (CONT2)
Time from 50% of CONT3 (High
→
Low) to 50% of output final value
Time from 50% of CONT3 (Low
→
High) to 50% of output final value
Time from 50% of ENABLE (Low
→
High) to 50% of output final value
Time from 50% of ENABLE (High
→
Low) to 50% of output final value
3
4
—
3.1
3.4
4.4
2.2
189
Oscillation level when IINR = 2V
60
77
85
ns
ns
%
ns
ns
ns
ns
MHz
mAp-p
12
Rise time
TR
13
Fall time
TF
14
Overshoot
OVS
15
CONT delay 1
CDELAY1
16
CONT delay 2
CDELAY2
17
LD delay 1
LDELAY1
18
LD delay 2
LDELAY2
19
Oscillation frequency
OSCFR
20
Oscillation level
OSCLE
Logic
CONTR, CONT2, CONT3, OSCENA, ENABLE
CONTR, CONT2, CONT3, OSCENA, ENABLE
Input impedance for IINR, IIN2 and IIN3
2
175 252 375
1.3
V
V
Ω
21
Logic Low level
VTHL
22
Logic High level
VTHH
CXA2610N
23
Input resistance
ZIN
CXA2610N
Electrical Characteristics Measurement Circuit
Vcc
22µ
0.1µ
GND
V1 3.9kΩ
IINR
V2 3.9kΩ
IIN2
2
3
4.3kΩ
4
V5 3.9kΩ
IIN3
V6
CONTR
V7
CONT2
V8
CONT3
8
9
7
TTL
10
6
11
V10
OSCENA
5
V-I
OSC
12
V11
ENABLE
V-I
Current
SW
Driver
15
10Ω
14
13
20Ω
1
V-I
16
–4–
CXA2610N
Description of Functions
(1) LD drive current value setting
The current controlled by the current setting pins IINR, IIN2 and IIN3 is output from the LD0 pin.
The current flowing to the LD0 pin can be set independently for IINR, IIN2 and IIN3 by CONTR, CONT2 and
CONT3.
(2) LD drive current forced OFF
Forced OFF is enabled by setting the ENABLE pin Low.
(3) Oscillation circuit
The oscillation circuit is turned ON forcibly by setting the OSCENA pin Low.
(OSCENA
×
CONTR
×
(CONT2 + CONT3))
The oscillation circuit is turned ON by setting the OSCENA pin High only for read.
(OSCENA
×
CONTR
×
CONT2
×
CONT3)
(4) Oscillation frequency adjustment
The oscillation frequency can be varied by the external resistance value connected to the OSCFR pin.
(5) Oscillation level adjustment
The oscillation level initial value can be set by the external resistance value connected to the OSCGA pin.
The oscillation level can be adjusted by varying the IINR input current value.
In addition, the read block DC compensation current I
R
that flows when oscillation is OFF is independent of
the OSCGA pin external resistance value, and is constant.
Level adjustment
I
O
– Oscillator amplitude [mAp-p]
Oscillator OFF
I
R
– Output current [mA]
Initial setting
Oscillator amplitude [mAp-p]
For large OSCGA
external resistance
(Io
≈
0mA)
For small OSCGA
external resistance
2I
R
I
O
+ 2 (I
R
– I
O
)
I
R
I
O
I
O
0
IINR input current [µA]
12
2k
I
R
< I
O
I
R
> I
O
OSCGA external resistance [Ω]
IINR input current [µA]
I
O
≈
OSCGA pin voltage
40
×
OSCGA external resistance
9
[mAp-p]
(6) Logic
The logic table for the CONTR, CONT2, CONT3 and ENABLE pins is shown below.
Be sure to also check the timing chart on page 7.
ENABLE
L
H
H
H
H
H
CONTR
X
H
L
L
L
L
CONT2
X
H
H
L
H
L
CONT3
X
H
H
H
L
L
LD0
OFF
OFF
IINR
IINR + IIN2
IINR + IIN3
IINR + IIN2 + IIN3
–5–
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