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CS4124YN16

Description
High Side PWM FET Controller
CategoryPower/power management    The power supply circuit   
File Size142KB,6 Pages
ManufacturerCHERRY
Websitehttp://www.cherry-semi.com
Download Datasheet Parametric Compare View All

CS4124YN16 Overview

High Side PWM FET Controller

CS4124YN16 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerCHERRY
package instructionPLASTIC, DIP-16
Reach Compliance Codeunknow
Analog Integrated Circuits - Other TypesSWITCHING CONTROLLER
control modeCURRENT-MODE
Control TechnologyPULSE WIDTH MODULATION
Maximum input voltage26 V
Minimum input voltage4 V
Nominal input voltage12 V
JESD-30 codeR-PDIP-T16
JESD-609 codee0
length19.18 mm
Number of functions1
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Maximum output current0.3 A
Nominal output voltage5 V
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Certification statusNot Qualified
surface mountNO
Switch configurationPUSH-PULL
technologyBIPOLAR
Temperature levelAUTOMOTIVE
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
CS4124
Preliminary
CS4124
High Side PWM FET Controller
Description
The CS4124 is a monolithic integrat-
ed circuit designed primarily to
control the rotor speed of perma-
nent magnet, direct current (DC)
brush motors. It drives the gate of
an N channel power MOSFET or
IGBT with a user-adjustable, fixed
frequency, variable duty cycle,
pulse width modulated (PWM) sig-
nal. The CS4124 can also be used to
control other loads such as incan-
descent bulbs and solenoids.
Inductive current from the motor or
solenoid is recirculated through an
external diode.
The CS4124 accepts a DC level
input signal of 0 to 5V to control the
pulse width of the output signal.
This signal can be generated by a
potentiometer referenced to the on-
chip 5V linear regulator, or a fil-
tered 0% to 100% PWM signal also
referenced to the 5V regulator.
The IC is placed in a sleep state by
pulling the CTL lead below 0.5V. In
this mode everything on the chip is
shutdown except for the on-chip
regulator and the overall current
draw is less than 275µA. There are a
number of on-chip diagnostics that
look for potential failure modes and
can disable the external power
MOSFET.
Features
s
150mA Peak PWM Gate
Drive Output
s
Patented Voltage
Compensation Circuit
s
100% Duty Cycle
Capability
s
5V, ± 3% Linear Regulator
s
Low Current Sleep Mode
s
Overvoltage Protection
s
Boost Mode Power
Supply
s
Output Inhibit
Applications Diagram
Package Option
V
BAT
42.5µH
16 Lead PDIP
1000µF
1000µF
R
S
10
470µH
10K
10nF
1.5µF
C
FLT
.25µF
R
OSC
93.1K
C
OSC
470pF
OUTPUT Gnd
BOOST
INH
FLT
I
ADJ
R
OSC
C
OSC
CTL
PGnd
I
SENSE+
I
SENSE-
PMP
SNI
R
SNI
4
R
CS1
C
CS
51
.022µF
R
CS2
51
R
SENSE
4m
OUTPUT
BOOST
FLT
R
OSC
C
OSC
CTL
PGnd
V
CC
1
Gnd
INH
I
ADJ
I
SENSE+
I
SENSE-
PMP
SNI
V
REG
V
CC
100µF
.01µF
10K
1µF
P1
10K
100K
V
REG
Input
10K
R
GATE
6
10K
N1
10K
10K
10µF
1M
MOT+
MOT-
Consult Factory for 16 Lead SOIC
Wide package.
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 4/26/99
1195
A
®
Company

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