C8051F310/1/2/3/4/5/6/7
8/16 kB ISP Flash MCU Family
Analog Peripherals
-
10-Bit ADC (C8051F310/1/2/3/6 only)
•
•
•
•
•
High Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
-
-
Memory
-
1280 bytes internal data RAM (1024 + 256)
-
16 kB (C8051F310/1/6/7) or 8 kB (C8051F312/3/4/5)
Flash; In-system programmable in 512-byte sectors
instructions in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
Up to 200 ksps
Up to 21, 17, or 13 external single-ended or differen-
tial inputs
VREF from external pin or V
DD
Built-in temperature sensor
External conversion start input
Programmable hysteresis and response time
Configurable as interrupt or reset source
(Comparator0)
Low current ( 0.5 µA)
-
Comparators
•
•
•
On-Chip Debug
-
On-chip debug circuitry facilitates full speed,
-
-
Digital Peripherals
-
29/25/21 Port I/O;
-
-
-
-
All 5 V tolerant with high sink current
Hardware enhanced UART, SMBus™, and SPI™
serial ports
Four general purpose 16-bit counter/timers
16-bit programmable counter array (PCA) with five
capture/compare modules
Real time clock capability using PCA or timer and
external clock source
-
Supply Voltage 2.7 to 3.6 V
-
Typical operating current:
5 mA at 25 MHz;
-
-
Typical stop mode current:
Temperature range:
11 µA at 32 kHz
0.1 µA
–40 to +85 °C
non-intrusive in-system debug
(no emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-Chips, target pods, and sockets
Complete development kit
Clock Sources
-
Internal oscillator: 24.5 MHz with ±2% accuracy
-
-
supports crystal-less UART operation
External oscillator: Crystal, RC, C, or clock (1 or 2
pin modes)
Can switch between clock sources on-the-fly; useful
in power saving modes
Packages
-
32-pin LQFP (C8051F310/2/4)
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28-pin QFN (C8051F311/3/5)
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24-pin QFN (C8051F316/7)
CROSSBAR
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
Port 1
Port 2
Port 3
10-bit
200ksps
ADC
+
-
+
-
VOLTAGE
COMPARATORS
TEMP
SENSOR
C8051F310/1/2/3/6 only
PROGRAMMABLE PRECISION INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
16 kB/8 kB
ISP FLASH
14
INTERRUPTS
8051 CPU
(25MIPS)
DEBUG
CIRCUITRY
1280 B
SRAM
POR
WDT
Rev. 1.7 8/06
Copyright © 2006 by Silicon Laboratories
C8051F31x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
C8051F310/1/2/3/4/5/6/7
N
OTES
:
2
Rev. 1.7
C8051F310/1/2/3/4/5/6/7
Table Of Contents
1. System Overview.................................................................................................... 17
1.1. CIP-51™ Microcontroller Core.......................................................................... 27
1.1.1. Fully 8051 Compatible.............................................................................. 27
1.1.2. Improved Throughput ............................................................................... 27
1.1.3. Additional Features .................................................................................. 28
1.2. On-Chip Memory............................................................................................... 29
1.3. On-Chip Debug Circuitry................................................................................... 30
1.4. Programmable Digital I/O and Crossbar ........................................................... 31
1.5. Serial Ports ....................................................................................................... 32
1.6. Programmable Counter Array ........................................................................... 32
1.7. 10-Bit Analog to Digital Converter..................................................................... 33
1.8. Comparators ..................................................................................................... 34
2. Absolute Maximum Ratings .................................................................................. 35
3. Global DC Electrical Characteristics .................................................................... 36
4. Pinout and Package Definitions............................................................................ 39
5. 10-Bit ADC (ADC0, C8051F310/1/2/3/6 only) ........................................................ 51
5.1. Analog Multiplexer ............................................................................................ 51
5.2. Temperature Sensor ......................................................................................... 52
5.3. Modes of Operation .......................................................................................... 54
5.3.1. Starting a Conversion............................................................................... 54
5.3.2. Tracking Modes........................................................................................ 55
5.3.3. Settling Time Requirements ..................................................................... 56
5.4. Programmable Window Detector ...................................................................... 61
5.4.1. Window Detector In Single-Ended Mode ................................................. 63
5.4.2. Window Detector In Differential Mode...................................................... 64
6. Voltage Reference (C8051F310/1/2/3/6 only)........................................................ 67
7. Comparators ........................................................................................................... 69
8. CIP-51 Microcontroller .......................................................................................... 79
8.1. Instruction Set ................................................................................................... 80
8.1.1. Instruction and CPU Timing ..................................................................... 80
8.1.2. MOVX Instruction and Program Memory ................................................. 81
8.2. Memory Organization........................................................................................ 85
8.2.1. Program Memory...................................................................................... 85
8.2.2. Data Memory............................................................................................ 86
8.2.3. General Purpose Registers ...................................................................... 86
8.2.4. Bit Addressable Locations........................................................................ 86
8.2.5. Stack ....................................................................................................... 86
8.2.6. Special Function Registers....................................................................... 87
8.2.7. Register Descriptions ............................................................................... 90
8.3. Interrupt Handler ............................................................................................... 93
8.3.1. MCU Interrupt Sources and Vectors ........................................................ 94
8.3.2. External Interrupts .................................................................................... 95
8.3.3. Interrupt Priorities ..................................................................................... 95
Rev. 1.7
3
C8051F310/1/2/3/4/5/6/7
8.3.4. Interrupt Latency ...................................................................................... 95
8.3.5. Interrupt Register Descriptions................................................................. 97
8.4. Power Management Modes ............................................................................ 102
8.4.1. Idle Mode................................................................................................ 102
8.4.2. Stop Mode .............................................................................................. 103
9. Reset Sources....................................................................................................... 105
9.1. Power-On Reset ............................................................................................. 106
9.2. Power-Fail Reset / V
DD
Monitor...................................................................... 106
9.3. External Reset ................................................................................................ 107
9.4. Missing Clock Detector Reset......................................................................... 108
9.5. Comparator0 Reset......................................................................................... 108
9.6. PCA Watchdog Timer Reset........................................................................... 108
9.7. Flash Error Reset............................................................................................ 108
9.8. Software Reset ............................................................................................... 108
10. Flash Memory ..................................................................................................... 111
10.1.Programming The Flash Memory ................................................................... 111
10.1.1.Flash Lock and Key Functions ............................................................... 111
10.1.2.Flash Erase Procedure .......................................................................... 111
10.1.3.Flash Write Procedure ........................................................................... 112
10.2.Non-volatile Data Storage .............................................................................. 112
10.3.Security Options ............................................................................................. 113
10.4.Flash Write and Erase Guidelines .................................................................. 115
10.4.1.V
DD
Maintenance and the V
DD
Monitor ................................................. 115
10.4.2.PSWE Maintenance ............................................................................... 115
10.4.3.System Clock ......................................................................................... 116
11. External RAM ........................................................................................................ 119
12. Oscillators ............................................................................................................. 121
12.1.Programmable Internal Oscillator ................................................................... 121
12.2.External Oscillator Drive Circuit...................................................................... 124
12.3.System Clock Selection.................................................................................. 124
12.4.External Crystal Example ............................................................................... 126
12.5.External RC Example ..................................................................................... 127
12.6.External Capacitor Example ........................................................................... 127
13. Port Input/Output ................................................................................................ 129
13.1.Priority Crossbar Decoder .............................................................................. 131
13.2.Port I/O Initialization ....................................................................................... 133
13.3.General Purpose Port I/O ............................................................................... 135
14. SMBus ................................................................................................................... 145
14.1.Supporting Documents ................................................................................... 146
14.2.SMBus Configuration...................................................................................... 146
14.3.SMBus Operation ........................................................................................... 146
14.3.1.Arbitration............................................................................................... 147
14.3.2.Clock Low Extension.............................................................................. 148
14.3.3.SCL Low Timeout................................................................................... 148
14.3.4.SCL High (SMBus Free) Timeout .......................................................... 148
4
Rev. 1.7
C8051F310/1/2/3/4/5/6/7
14.4.Using the SMBus............................................................................................ 149
14.4.1.SMBus Configuration Register............................................................... 150
14.4.2.SMB0CN Control Register ..................................................................... 153
14.4.3.Data Register ......................................................................................... 156
14.5.SMBus Transfer Modes.................................................................................. 157
14.5.1.Master Transmitter Mode ....................................................................... 157
14.5.2.Master Receiver Mode ........................................................................... 158
14.5.3.Slave Receiver Mode ............................................................................. 159
14.5.4.Slave Transmitter Mode ......................................................................... 160
14.6.SMBus Status Decoding................................................................................. 161
15. UART0.................................................................................................................... 163
15.1.Enhanced Baud Rate Generation................................................................... 164
15.2.Operational Modes ......................................................................................... 165
15.2.1.8-Bit UART ............................................................................................. 165
15.2.2.9-Bit UART ............................................................................................. 166
15.3.Multiprocessor Communications .................................................................... 167
16. Enhanced Serial Peripheral Interface (SPI0)...................................................... 173
16.1.Signal Descriptions......................................................................................... 174
16.1.1.Master Out, Slave In (MOSI).................................................................. 174
16.1.2.Master In, Slave Out (MISO).................................................................. 174
16.1.3.Serial Clock (SCK) ................................................................................. 174
16.1.4.Slave Select (NSS) ................................................................................ 174
16.2.SPI0 Master Mode Operation ......................................................................... 175
16.3.SPI0 Slave Mode Operation ........................................................................... 177
16.4.SPI0 Interrupt Sources ................................................................................... 177
16.5.Serial Clock Timing......................................................................................... 178
16.6.SPI Special Function Registers ...................................................................... 180
17. Timers ................................................................................................................... 187
17.1.Timer 0 and Timer 1 ....................................................................................... 187
17.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 187
17.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 189
17.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 189
17.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 190
17.2.Timer 2 .......................................................................................................... 195
17.2.1.16-bit Timer with Auto-Reload................................................................ 195
17.2.2.8-bit Timers with Auto-Reload................................................................ 196
17.3.Timer 3 .......................................................................................................... 199
17.3.1.16-bit Timer with Auto-Reload................................................................ 199
17.3.2.8-bit Timers with Auto-Reload................................................................ 200
18. Programmable Counter Array ............................................................................ 203
18.1.PCA Counter/Timer ........................................................................................ 204
18.2.Capture/Compare Modules ............................................................................ 205
18.2.1.Edge-triggered Capture Mode................................................................ 206
18.2.2.Software Timer (Compare) Mode........................................................... 207
Rev. 1.7
5
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