256Mb and 512Mb (256Mb/256Mb), P30-65nm
Features
Micron Parallel NOR Flash Embedded
Memory (P30-65nm)
JS28F256P30B/TFx, RC28F256P30B/TFx, PC28F256P30B/TFx,
RD48F4400P0VBQEx, RC48F4400P0VB0Ex,
PC48F4400P0VB0Ex, PF48F4000P0ZB/TQEx
Features
• High performance
– 100ns initial access for Easy BGA
– 110ns initial access for TSOP
– 25ns 16-word asychronous page read mode
– 52 MHz (Easy BGA) with zero WAIT states and
17ns clock-to-data output synchronous burst
read mode
– 4-, 8-, 16-, and continuous word options for burst
mode
– Buffered enhanced factory programming (BEFP)
at 2 MB/s (TYP) using a 512-word buffer
– 1.8V buffered programming at 1.14 MB/s (TYP)
using a 512-word buffer
• Architecture
– MLC: highest density at lowest cost
– Asymmetrically blocked architecture
– Four 32KB parameter blocks: top or bottom con-
figuration
– 128KB main blocks
– Blank check to verify an erased block
• Voltage and power
– V
CC
(core) voltage: 1.7V to 2.0V
– V
CCQ
(I/O) voltage: 1.7V to 3.6V
– Standy current: 65µA (TYP) for 256Mb
– 52 MHz continuous synchronous read current:
21mA (TYP), 24mA (MAX)
• Security
– One-time programmable register: 64 OTP bits,
programmed with unique information from Mi-
cron; 2112 OTP bits available for customer pro-
gramming
– Absolute write protection: V
PP
= V
SS
– Power-transition erase/program lockout
– Individual zero-latency block locking
– Individual block lock-down
– Password access
• Software
–
25μs
(TYP) program suspend
–
25μs
(TYP) erase suspend
– Flash Data Integrator optimized
– Basic command set and extended function Inter-
face (EFI) command set compatible
– Common flash interface
• Density and Packaging
– 56-lead TSOP package (256Mb only)
– 64-ball Easy BGA package (256Mb, 512Mb)
– QUAD+ and SCSP packages (256Mb, 512Mb)
– 16-bit wide data bus
• Quality and reliabilty
– JESD47 compliant
– Operating temperature: –40°C to +85°C
– Minimum 100,000 ERASE cycles per block
– 65nm process technology
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
256Mb and 512Mb (256Mb/256Mb), P30-65nm
Features
Discrete and MCP Part Numbering Information
Devices are shipped from the factory with memory content bits erased to 1. For available options, such as pack-
ages or for further information, contact your Micron sales representative. Part numbers can be verified at
www.mi-
cron.com.
Feature and specification comparison by device type is available at
www.micron.com/products.
Con-
tact the factory for devices not found.
Note:
Not all part numbers listed here are available for ordering.
Table 1: Discrete Part Number Information
Part Number Category
Package
Category Details
JS = 56-lead TSOP, lead free
PC = 64-ball Easy BGA, lead-free
RC = 64-ball Easy BGA, leaded
Product Line
Density
Product Family
Parameter Location
Lithography
Features
Note:
28F = Micron Flash memory
256 = 256Mb
P30 (VCC = 1.7 to 2.0V; VCCQ = 1.7 to 3.6V)
B/T = Bottom/Top parameter
F = 65nm
*
1. The last digit is assigned randomly to cover packaging media, features, or other specific configuration infor-
mation. Sample part number: JS28F256P30BF*
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
256Mb and 512Mb (256Mb/256Mb), P30-65nm
Features
Table 2: MCP Part Number Information
Part Number Category
Package
Category Details
RD = Micron MCP, leaded
PF = Micron MCP, lead-free
RC = 64-ball Easy BGA, leaded
PC = 64-ball Easy BGA, lead-free
Product Line
Density
Product Family
IO Voltage and Chip Configuration
48F = Micron Flash memory only
0 = No die
4 = 256Mb
P = Micron Flash memory (P30)
0 = No die
Z = Individual Chip Enables
V = Virtual Chip Enables
VCC = 1.7 to 2.0V; VCCQ = 1.7 to 3.6V
Parameter Location
Ballout
Lithography
Features
Note:
B/T = Bottom/Top parameter
Q = QUAD+
0 = Discrete
E = 65nm
*
1. The last digit is assigned randomly to cover packaging media, features, or other specific configuration infor-
mation. Sample part number: RC48F4400P0VB0E*
Table 3: Discrete and MCP Part Combinations
Package
JS
Density
256Mb
Packing Media
Tray
Tape and Reel
Tray
PC
256Mb
Tray
Tape and Reel
Tray
512Mb
(256Mb/256Mb)
PF
256Mb
512Mb
(256Mb/256Mb)
Tray
Tape and Reel
Tray
Tray
Tray
Tape and Reel
B
T
B/T
T
B/T
T
B
Boot Configuration
B
1
Part Number
JS28F256P30BFE
JS28F256P30BFF
JS28F256P30TFE
PC28F256P30BFE
PC28F256P30BFF
PC28F256P30TFE
PC48F4400P0VB0EE
PC48F4400P0VB0EF
PF48F4000P0ZBQEF
PF48F4000P0ZTQEJ
PF48F4400P0VBQEF
PF48F4400P0VBQEK
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
256Mb and 512Mb (256Mb/256Mb), P30-65nm
Features
Table 3: Discrete and MCP Part Combinations (Continued)
Package
RC
Density
256Mb
Packing Media
Tray
Tray
Tape and Reel
512Mb
(256Mb/256Mb)
RD
Note:
512Mb
(256Mb/256Mb)
Tray
Tray
B/T
B/T
Boot Configuration
B
T
1
Part Number
RC28F256P30BFE
RC28F256P30TFE
RC28F256P30TFF
RC48F4400P0VB0EJ
RD48F4400P0VBQEJ
1. Bottom Boot/Top Boot = B/T
Table 4: OTP Feature Part Combinations
Package
JS
PC
PF
RC
RD
Notes:
Density
–
256Mb
–
–
–
Packing Media
–
Tape and Reel
–
–
–
Boot Configuration
–
B
–
–
–
1
Part Number
–
PC28F256P30BFR
–
–
–
1. This data sheet covers only standard parts. For OTP parts, contact your local Micron representative.
2. Bottom Boot/Top Boot = B/T
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
256Mb and 512Mb (256Mb/256Mb), P30-65nm
Features
Contents
General Description ......................................................................................................................................... 9
Virtual Chip Enable Description ........................................................................................................................ 9
Memory Map ................................................................................................................................................. 12
Package Dimensions ....................................................................................................................................... 13
Pinouts and Ballouts ....................................................................................................................................... 17
Signal Descriptions ......................................................................................................................................... 21
Bus Operations ............................................................................................................................................... 24
Read .......................................................................................................................................................... 24
Write .......................................................................................................................................................... 24
Output Disable ........................................................................................................................................... 24
Standby ..................................................................................................................................................... 24
Reset .......................................................................................................................................................... 25
Device Command Codes ................................................................................................................................. 26
Device Command Bus Cycles .......................................................................................................................... 29
Read Operations ............................................................................................................................................. 31
Asynchronous Page Mode Read ................................................................................................................... 31
Asynchronous Single Word Read ................................................................................................................. 31
Synchronous Burst Mode Read ................................................................................................................... 32
Read CFI .................................................................................................................................................... 32
Read Device ID ........................................................................................................................................... 32
Device ID Codes ............................................................................................................................................. 33
Program Operations ....................................................................................................................................... 34
Word Programming (40h) ........................................................................................................................... 34
Buffered Programming (E8h, D0h) .............................................................................................................. 34
Buffered Enhanced Factory Programming (80h, D0h) ................................................................................... 35
Program Suspend ....................................................................................................................................... 37
Program Resume ........................................................................................................................................ 38
Program Protection .................................................................................................................................... 38
Erase Operations ............................................................................................................................................ 39
BLOCK ERASE Command ........................................................................................................................... 39
BLANK CHECK Command .......................................................................................................................... 39
ERASE SUSPEND Command ....................................................................................................................... 40
ERASE RESUME Command ........................................................................................................................ 40
Erase Protection ......................................................................................................................................... 40
Security Operations ........................................................................................................................................ 41
Block Locking ............................................................................................................................................. 41
BLOCK LOCK Command ............................................................................................................................ 41
BLOCK UNLOCK Command ....................................................................................................................... 41
BLOCK LOCK DOWN Command ................................................................................................................. 41
Block Lock Status ....................................................................................................................................... 41
Block Locking During Suspend ................................................................................................................... 42
Selectable OTP Blocks ................................................................................................................................. 43
Password Access ......................................................................................................................................... 43
Status Register ................................................................................................................................................ 44
Read Status Register ................................................................................................................................... 44
Clear Status Register ................................................................................................................................... 45
Configuration Register .................................................................................................................................... 46
Read Configuration Register ....................................................................................................................... 46
Read Mode ................................................................................................................................................. 46
Latency Count ............................................................................................................................................ 47
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.