EEWORLDEEWORLDEEWORLD

Part Number

Search

SIT2044BEUS3-30SA25.000625D

Description
LVCMOS Output Clock Oscillator, 25.000625MHz Nom, SOT23-5
CategoryPassive components    oscillator   
File Size630KB,13 Pages
ManufacturerSiTime
Environmental Compliance
Download Datasheet Parametric View All

SIT2044BEUS3-30SA25.000625D Overview

LVCMOS Output Clock Oscillator, 25.000625MHz Nom, SOT23-5

SIT2044BEUS3-30SA25.000625D Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid145138068360
package instructionTSOP5/6,.11,37
Reach Compliance Codecompliant
Country Of OriginMalaysia, Taiwan, Thailand
YTEOL6.65
Other featuresSTANDBY; ENABLE/DISABLE FUNCTION; ALSO COMPATIBLE WITH LVTTL O/P
maximum descent time3 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Installation featuresSURFACE MOUNT
Number of terminals5
Nominal operating frequency25.000625 MHz
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
Oscillator typeLVCMOS
Output load15 pF
Maximum output low current4 mA
Encapsulate equivalent codeTSOP5/6,.11,37
physical size3.05mm X 1.75mm X 1.45mm
longest rise time3 ns
Filter levelAEC-Q100
Maximum slew rate4.8 mA
Maximum supply voltage3.3 V
Minimum supply voltage2.7 V
Nominal supply voltage3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
SiT2044B
PRELIMINARY
1 – 110 MHz, -55 to 125°C, SOT23, Endura™ Series Oscillator
Features
Applications
Best acceleration sensitivity of 0.1 ppb/g
Any frequencies between 1 MHz and 110 MHz accurate to
6 decimal places
Supply voltage of 1.8V or 2.25V to 3.63V
Excellent total frequency stability as low as ±20 ppm
Low power consumption of 3.8 mA typical at 1.8V
LVCMOS/LVTTL compatible output
AEC-Q100 qualified
5-pin SOT23-5 package: 2.9 x 2.8 mm x mm
RoHS and REACH compliant, Pb-free, Halogen-free and
Antimony-free
Contact SiTime
for up-screening and LAT programs
Avionics systems
Field communication systems
Telemetry applications
Electrical Characteristics
Table 1. Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and nominal supply voltage.
Parameters
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
1
-20
-25
-30
-50
Operating Temperature Range
(ambient)
T_use
-40
-40
-40
-55
Acceleration (g) sensitivity,
Gamma Vector
Supply Voltage
Current Consumption
F_g
Typ.
Max.
110
+20
+25
+30
+50
+85
+105
+125
+125
0.1
Unit
MHz
ppm
ppm
ppm
ppm
°C
°C
°C
°C
ppb/g
AEC-Q100 Grade 3
AEC-Q100 Grade 2
AEC-Q100 Grade 1
Extended cold, AEC-Q100 Grade1
Condition
Refer to Tables 14 to 16 for a
list of supported frequencies
Inclusive of Initial tolerance at 25°C, 1st year aging at 25°C, and
variations over operating temperature, rated power supply
voltage and load (15 pF ± 10%).
Frequency Range
Frequency Stability and Aging
Operating Temperature Range
Rugged Characteristics
Low sensitivity grade; total gamma over 3 axes; 15 Hz to
2 kHz; MIL-PRF-55310, computed per section 4.8.18.3.1
Supply Voltage and Current Consumption
1.8
4.0
3.8
1.5
1.3
1.98
3.63
4.8
4.5
55
3
2.5
V
V
mA
mA
%
ns
ns
Vdd
All voltages between 2.25V and 3.63V including 2.5V, 2.8V,
3.0V and 3.3V are supported.
No load condition, f = 20 MHz, Vdd = 2.25V to 3.63V
No load condition, f = 20 MHz, Vdd = 1.8V
All Vdds
Vdd = 2.25V - 3.63V, 20% - 80%
Vdd = 1.8V, 20% - 80%
IOH = -4 mA (Vdd = 3.0V or 3.3V)
IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOH = -2 mA (Vdd = 1.8V)
IOL = 4 mA (Vdd = 3.0V or 3.3V)
IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOL = 2 mA (Vdd = 1.8V)
Pin 1, OE
Pin 1, OE
Pin 1, OE logic high or logic low
Vdd
Idd
1.62
2.25
LVCMOS Output Characteristics
Duty Cycle
Rise/Fall Time
Output High Voltage
DC
Tr, Tf
VOH
45
90%
Output Low Voltage
VOL
10%
Vdd
Input Characteristics
Input High Voltage
Input Low Voltage
Input Pull-up Impedance
VIH
VIL
Z_in
70%
100
30%
Vdd
Vdd
k
Rev 0.5
July 22, 2019
www.sitime.com
Introduction to PID Control Algorithm and Strategy
Share PID algorithm information...
suncat Download Centre
DSP28335 Peripheral Clock
After TMS320F28335 generates a multiplied clock signal CLKIN through an external clock signal, OSC and PLL, CLKIN generates a clock SYSCLKOUT after passing through the CPU (CLKIN and SYSCLKOUT have th...
Jacktang DSP and ARM Processors
Please explain the role of the window comparator here
What is the difference between using window comparison and using a single comparator here?[url]https://m.eeworld.com.cn/ic_article/263/1774.html[/url]...
littleshrimp Analog electronics
EEWORLD University Hall----Live Replay: TI MSP430 low-power analog peripherals help home portable healthcare products
Live replay: TI MSP430 low-power analog peripherals enable portable home healthcare products : https://training.eeworld.com.cn/course/5607...
hi5 Integrated technical exchanges
[Sipeed LicheeRV 86 Panel Review] I Unboxing and Basic Function Test
[i=s]This post was last edited by zhang1gong on 2022-3-7 16:15[/i]After submitting the evaluation application, I finally received the shortlisted notification after a long wait. Only one day later, I ...
zhang1gong Domestic Chip Exchange
[Atria Development Board AT32F421 Review] 4. Run RTX
I've been very interested in RTX recently. You can use it as an operating system just by checking the box without porting. Compared with a domestic operating system, I think it's not only convenient b...
ddllxxrr Domestic Chip Exchange

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号