Data Sheet No. PD60146
Rev O
IR2117(S)/IR2118(S) & (PbF)
SINGLE CHANNEL DRIVER
Features
•
Floating channel designed for bootstrap operation
•
•
•
•
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
CMOS Schmitt-triggered inputs with pull-down
Output in phase with input (IR2117) or out of
phase with input (IR2118)
Also available LEAD-FREE
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
(typ.)
600V max.
200 mA / 420 mA
10 - 20V
125 & 105 ns
Description
The IR2117/IR2118(S) is a high voltage, high speed
power MOSFET and IGBT driver. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. The logic input is compatible
with standard CMOS outputs. The output driver fea-
tures a high pulse current buffer stage designed for
minimum cross-conduction. The floating channel can
be used to drive an N-channel power MOSFET or IGBT
in the high or low side configuration which operates up
to 600 volts.
Packages
8-Lead PDIP
IR2117/IR2118
8-Lead SOIC
IR2117S/IR2118S
Typical Connection
up to 600V
V
CC
IN
V
CC
IN
COM
V
B
HO
V
S
TO
LOAD
IR2117
up to 600V
V
CC
IN
V
CC
IN
COM
V
B
HO
V
S
TO
LOAD
(Refer to Lead Assignments for correct pin configuration).
This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for
proper circuit board layout.
IR2118
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1
IR2117(S)/IR2118(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 5 through 8.
Symbol
V
B
V
S
V
HO
V
CC
V
IN
dV
s
/dt
P
D
Rth
JA
T
J
T
S
T
L
Definition
High side floating supply voltage
High side floating supply offset voltage
High side floating output voltage
Logic supply voltage
Logic input voltage
Allowable offset supply voltage transient (figure 2)
Package power dissipation @ T
A
≤
+25°C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(8 lead PDIP)
(8 lead SOIC)
(8 lead PDIP)
(8 lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
—
—
—
—
—
—
-55
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
50
1.0
0.625
125
200
150
150
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol
V
B
V
S
V
HO
V
CC
V
IN
T
A
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Logic supply voltage
Logic input voltage
Ambient temperature
Min.
V
S
+ 10
Note 1
V
S
10
0
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
125
Units
V
°C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
2
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IR2117(S)/IR2118(S) & (PbF)
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in Figure 3.
Symbol
t
on
t
off
t
r
t
f
Definition
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
Min. Typ. Max. Units Test Conditions
—
—
—
—
125
105
80
40
200
180
130
65
ns
V
S
= 0V
V
S
= 600V
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to
COM. The V
O
and I
O
parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
V
IH
V
IL
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
BSUV+
V
BSUV-
V
CCUV+
V
CCUV-
I
O+
Definition
input voltage - logic “1” (IR2117) logic “0” (IR2118)
Input voltage - logic “0” (IR2117) logic “1” (IR2118)
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
Supply Current
Logic “1” input bias current
Logic “0” input bias current
(IR2117)
(IR2118)
(IR2117)
(IR2118)
V
BS
supply undervoltage positive going threshold
V
BS
supply undervoltage negative going threshold
V
CC
supply undervoltage positive going threshold
V
CC
supply undervoltage negative going threshold
Output high short circuit pulsed current
Min. Typ. Max. Units Test Conditions
9.5
—
—
—
—
—
—
—
—
7.6
7.2
7.6
7.2
200
—
—
—
—
—
50
70
20
—
8.6
8.2
8.6
8.2
250
—
6.0
100
100
50
240
340
40
1.0
9.6
9.2
9.6
9.2
—
V
O
= 0V
V
IN
= Logic “1”
PW
≤
10
µs
V
O
= 15V
V
IN
= Logic “0”
PW
≤
10
µs
V
µA
V
mV
I
O
= 0A
I
O
= 0A
V
B
= V
S
= 600V
V
IN
= 0V or V
CC
V
IN
= 0V or V
CC
V
IN
= V
CC
V
IN
= 0V
V
IN
= 0V
V
IN
= V
CC
I
O-
Output low short circuit pulsed current
420
500
—
mA
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IR2117(S)/IR2118(S) & (PbF)
Functional Block Diagram (IR2117)
V
CC
UV
DETECT
HV
LEVEL
SHIFT
V
B
R
R
S
Q
HO
PULSE
FILTER
IN
PULSE
GEN
UV
DETECT
V
S
COM
Functional Block Diagram (IR2118)
V
CC
UV
DETECT
HV
LEVEL
SHIFT
V
B
R
Q
R
S
V
S
HO
PULSE
FILTER
IN
PULSE
GEN
UV
DETECT
COM
4
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IR2117(S)/IR2118(S) & (PbF)
Lead Definitions
Symbol
V
CC
IN
IN
COM
V
B
HO
V
S
Description
Logic and gate drive supply
Logic input for gate driver output (HO), in phase with HO (IR2117)
Logic input for gate driver output (HO), out of phase with HO (IR2118)
Logic ground
High side floating supply
High side gate drive output
High side floating supply return
Lead Assignments
1
2
3
4
VCC
IN
COM
VB
HO
VS
8
7
6
5
1
2
3
4
VCC
IN
COM
VB
HO
VS
8
7
6
5
8 Lead PDIP
8 Lead SOIC
IR2117
IR2117S
1
2
3
4
VCC
IN
COM
VB
HO
VS
8
7
6
5
1
2
3
4
VCC
IN
COM
VB
HO
VS
8
7
6
5
8 Lead PDIP
8 Lead SOIC
IR2118
IR2118S
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5
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