RT9941
Power Management ICs for Handheld Device
General Description
The RT9941 is a complete power management IC (PMIC)
for handheld device platform. This PMIC contains a fully
integrated linear charger for a single cell Lithium Ion battery,
five LDO linear regulators and two high efficiency buck
converters, a comparator, a reset and an I
2
C serial interface
to program one buck and one regulator output voltages as
well as power on timing control for complete flexibility.
The linear charger integrates LDO, MOSFET pass element
and thermal-regulation circuitry. The proprietary thermal-
regulation circuitry limits the die temperature when fast
charging or while exposed to high ambient temperatures,
allowing maximum charging current without damaging the
IC.
The two step-down converters are optimized for small size
inductor and high efficiency applications. They utilize a
proprietary hysteretic PWM control scheme that switches
with nearly fixed frequency and is adjustable, allowing the
customer to trade some efficiency for smaller external
component as desired.
The LDO linear regulators provide high power supply
rejection rate and have only 45μV
RMS
of output noises for
100Hz to 10kHz frequency range to power noise sensitive
RF sections.
The RT9941 is
available
in WQFN-40L 5x5 package.
Features
Charger
Adapter & Battery Two Input with Auto Power
Dynamic Path.
PWR_IN LDO support continuous 1.5A, peak 2A
current
4.5V to 5.5V Operation Voltage Range with Max.
Input 18V from PWR_IN Pin
Switch Well for LDO and Charger Power MOSFET
Set Charge Current by ISETA Pin
Charge Status Indicator
Interrupt for PWR_IN Plug In/Out Time Out and
Charger Done.
Battery Temperature Monitoring
Hysteretic Buck
Buck 1 for DDR Memory, Adjustable Voltage and
600mA Output Current
Buck 2 for PDN with 25mV/step I
2
C Adjustable
800mA Output Current
Max. Efficiency Up to 90%
LDO
LDO1 : 3.3V/500mA for I/O, Default ON
LDO2 : 1.2V/80mA for PLL, Default ON
LDO3 : 1.2V/80mA for Pre-Core. I
2
C Adiustable,
Sync. with Buck2, Default ON
LDO4 : 2.5V/50mA for AVDD of USB, ADC, TSC,
Default ON
LDO5 : 3.3V/50mA for AVDD of USB, Default ON
Minimize the External Component Counts
Other
System Reset
Low Voltage Detector
I
2
C Compatible Interface
Power ON Timing Control
RoHS Compliant and Halogen Free
Ordering Information
RT9941
Package Type
QW : WQFN-40L 5x5 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Applications
GPS and PDA
Handheld Devices
DS9941-01 April 2011
www.richtek.com
1
RT9941
Pin Configurations
(TOP VIEW)
PWR_HOLD
CLK
30
29
28
27
26
25
24
41
23
22
21
11 12 13 14 15 16 17 18 19 20
ISETU
40 39 38 37 36 35 34 33 32 31
nCHG_S
ISETA
TS
TIMER
VOUT2
VIN3
VOUT3
VOUT1
VIN2
VOUT4
PWR_ON
HP_PWR
PWR_IN
PWR_IN
PWR_ID
VSYS
VSYS
1
2
3
4
5
6
7
8
9
10
GND
DATA
BATT
BATT
FB1
PGND1
LX1
VIN1
LX2
PGND2
FB2
nPBSTAS
nRESET
nINT
VOUT5
GND
S2
nLBO
LBI
S1
WQFN-40L 5x5
Typical Application Circuit
RT9941
LDO1 (S1 and S2 Control) 500mA
LDO2 (S1 and S2 Control) 200mA
LDO3 80mA
LDO4 (I2C Control) 50mA
1µF
LDO5 (I2C Control) 50mA
+5V (Adapter / USB)
To VIN1, VIN2, VIN3
22µF
28, 29
+
PWR_EN
1µF
1µF
1µF
8 VOUT1
5 VOUT2
7
VOUT3
LX1 25
FB1 27
L1
2.2µH
200k
100k
120pF
V
BUCK1
1.8V/600mA
4.7µF
10 VOUT4
1µF
11 VOUT5
38, 39 PWR_IN
35, 36 VSYS
BATT
PGND1 26
LX2 23
FB2 21
100k
PGND2 22
VIN1 24
VIN2 9
10µF
VSYS
10µF
VSYS
VSYS
L2
2.2µH
100k
220pF
V
BUCK2
1.2V/600mA
4.7µF
4.7µF
NTC
3 TS
2 ISETA
4
C
TIMER
0.1µF
TIMER
VIN3
6
4.7µF
17, Exposed Pad (41)
R
SET
2k
(750mA)
510
100k
GND
nPBSTAS 12
1 nCHG_S
16
LBI
nRESET 13
nINT
14
100k
100k
100k
100k
4.7k
4.7k
VSYS
VSYS
VSYS
V
BACK1
VSYS
VSYS
VSYS
VSYS
VSYS
RTC Alarm Wake Up
39k
V
BACK1
500mA
100mA
From CPU, uP
USB
Adapter
100k
32 PWR_HOLD
40 ISETU
18 S2
19 S1
20 PWR_EN
37
PWR_ID
nLBO 15
DATA 30
CLK 31
PWR_ON 33
HP_PWR 34
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2
DS9941-01 April 2011
RT9941
Functional Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
nCHG_S
ISETA
TS
TIMER
VOUT2
VIN3
VOUT3
VOUT1
VIN2
VOUT4
VOUT5
nPBSTAS
nRESET
nINT
nLBO
LBI
Pin Function
This pin indicates the status of the battery charger. Open Drain Output and
Active Low.
PWR_IN Charge Current Setting Pin.
Temperature Sense Pin.
Charge Time Setting.
1.2V/80mA LDO regulator.
This pin must be shorted to VSYS, VIN1 and VIN2. Connect a 4.7μF ceramic
capacitor from VIN3 to GND.
1.2V/80mA LDO Regulator with 25mV/Step Adjustable.
3.3V/500mA LDO Regulator.
Must be shorted to VSYS, VIN1 and VIN3. Connect a 10μF ceramic capacitor
from VIN2 to GND.
2.5V/50mA LDO Regulator.
3.3V/50mA LDO Regulator.
Push-Button Status Pin. This pin is used to inform the power good state to
processor. Open Drain Output and Active Low.
This pin provides a 200ms reset signal during power-up to initialize a processor.
Open Drain and Active Low.
This pin must be Active Low to inform processor the interrupt events happened,
Open Drain Output and Active Low.
Low-Battery indication. Open Drain Output and Active Low.
Low-Battery Detection. This pin is used to monitor the VSYS Voltage and the
internal reference voltage is 1V
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
LDO1 & LDO2 Output Voltage Setting, Directly Connect VSYS to Pull High,
GND to Pull Low.
LDO1 & LDO2 Output Voltage Setting, Directly Connect VSYS to Pull High,
GND to Pull Low.
Buck2 & LDO2 Enable Pin from Processor.
Voltage Feedback2. FB2 Regulates to 0.6V nominal.
Buck 2’s Power Ground.
Inductor Connection to the Drains of the Internal N- MOSFETs and P-MOSFETs.
This pin must be shorted to VSYS, VIN2, and VIN3. Connect a 10μF ceramic
capacitor from VIN1 to GND.
Inductor Connection to the Drains of the Internal N-MOSFETs and P-MOSFETs.
Buck 1’s Power Ground.
Voltage Feedback1. FB1 Regulates to 0.6V Nominal.
Main Battery Supply Input Terminal. This pin delivers charging current and
monitors battery voltage.
Data Input/output for Serial Interface.
Clock Input for Serial Interface.
Logic Low Signal from Processor to Turn Off the PMU.
17,
GND
41 (Exposed Pad)
18
19
20
21
22
23
24
25
26
27
28,29
30
31
32
S2
S1
PWR_EN
FB2
PGND2
LX2
VIN1
LX1
PGND1
FB1
BATT
DATA
CLK
PWR_HOLD
To be continued
DS9941-01 April 2011
www.richtek.com
3
RT9941
Functional Pin Description
Pin No.
33
34
35,36
37
38,39
40
Pin Name
PWR_ON
HP_PWR
VSYS
PWR_ID
PWR_IN
ISETU
Pin Function
Active High Power On / Off Key Input. This pin has an Internal 2μA Pull-Down
Current to GND. When the push button is closed, It Is shorted to SYS, not
Ground. This input is de-bounced with 320ms (typ).
Logic High Signals Connection of Hands Free Kit. This Pin Has an Internal 2μA
Pull-Down Current to GND. This Input is De-bounced with 320ms (typ).
Connect this pin to System with a minimum 22μF ceramic capacitor to GND.
This pin must be shorted to VIN1, VIN2, and VIN3
Power Source Input Detection Pin.
Power Source Input. Connect a 4.7μF Ceramic Capacitor from this pin to GND.
USB Charge Current Setting Pin.
Function Block Diagram
PWR_ID
PWR_IN
VSYS
BATT
S2
S1
Control
Circuit
ISETU
ISETA
TS
TIMER
nCHG_S
nPBSTAS
SW
VIN1
LX1
Buck1
PGND1
FB1
Thermal
Shutdown
nRESET
Reset
Li-lon Linear Charger
Control
UVLO
LX2
PWR_ON
2µA
320ms
Debounce
Buck2
PGND2
FB2
PWR_EN
VIN3
LDO1
LDO2
LDO3
VSYS
+
-
HP_PWR
2µA
320ms
Debounce
Buck1 OK
ON/OFF
2
Control & I C
Interface
VOUT1
VOUT2
VOUT3
VOUT4
VIN2
VOUT5
PWR_HOLD
nLBO
1V
LDO4
LDO5
LBI
nINT
DATA
CLK
GND
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4
DS9941-01 April 2011
RT9941
Absolute Maximum Ratings
(Note 1)
PWR_IN ---------------------------------------------------------------------------------------------------- 0V to 7V
PWR_HOLD, PWR_ON, HP_PWR, DATA, CLK, nCHG_S, ISETA, TS, TIMER,
nPBSTAS, nRESET, nINT, nLBO, LBI, S2, PWR_EN, PWR_ID ------------------------------
−0.3V
to VSYS + 0.3V
FB2, FB1, LX2, LX1 --------------------------------------------------------------------------------------
−0.3V
to VIN1 + 0.3V
VOUT2, VOUT3 -------------------------------------------------------------------------------------------
−0.3V
to VIN3 + 0.3V
VOUT1, VOUT4, VOUT5 -------------------------------------------------------------------------------
−0.3V
to VIN2 + 0.3V
VIN1, VIN2, VIN3 ----------------------------------------------------------------------------------------- VSYS−0.3V to VSYS + 0.3V
BATT, VSYS ----------------------------------------------------------------------------------------------- 0V to 5.5V
ISETU -------------------------------------------------------------------------------------------------------
−0.3V
to PWR_IN + 0.3V
≤
6V
Power Dissipation, P
D
@ T
A
= 25°C
WQFN-40L 5x5 ------------------------------------------------------------------------------------------- 2.778W
Package Thermal Resistance (Note 2)
WQFN-40L 5x5,
θ
JA
-------------------------------------------------------------------------------------- 36°C/W
WQFN-40L 5x5,
θ
JC
------------------------------------------------------------------------------------- 7°C/W
Junction Temperature ------------------------------------------------------------------------------------ 150°C
Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------- 260°C
Storage Temperature Range ---------------------------------------------------------------------------
−65°C
to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) ----------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 4)
Junction Temperature Range ---------------------------------------------------------------------------
−40°C
to 125°C
Ambient Temperature Range ---------------------------------------------------------------------------
−40°C
to 85°C
Note 1.
Stresses beyond those listed under
“
Absolute Maximum Ratings
”
may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Note 2.
θ
JA
is measured in the natural convection at T
A
= 25°C on a high effective four layers thermal conductivity test board of JEDEC 51-7
thermal measurement standard. The case point of
θ
JC
is on the expose pad for the package.
Note 3.
Devices are ESD sensitive. Handling precaution is recommended.
Note 4.
The device is not guaranteed to function outside its operating conditions.
To be continued
DS9941-01 April 2011
www.richtek.com
5
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