V61C5181024-10N datasheet, PDF

V61C5181024-10N: DescriptionStandard SRAM, 128KX8, 10ns, CMOS, PDIP32; Categorystorage storage; File Size431KB，10 Pages; ManufacturerMosel Vitelic Corporation ( MVC ); Websitehttp://www.moselvitelic.com

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V61C5181024-10N Overview

Standard SRAM, 128KX8, 10ns, CMOS, PDIP32

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	101215867
package instruction	DIP, DIP32,.3
Reach Compliance Code	unknown
ECCN code	3A991.B.2.B
Maximum access time	10 ns
I/O type	COMMON
JESD-30 code	R-PDIP-T32
JESD-609 code	e0
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP32,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.005 A
Minimum standby current	4.5 V
Maximum slew rate	0.13 mA
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

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