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EH1425SJETTTS-28.7539MTR

Description
CRYSTAL OSCILLATOR, CLOCK, CMOS/TTL OUTPUT
CategoryPassive components    oscillator   
File Size936KB,10 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance
Download Datasheet Parametric View All

EH1425SJETTTS-28.7539MTR Overview

CRYSTAL OSCILLATOR, CLOCK, CMOS/TTL OUTPUT

EH1425SJETTTS-28.7539MTR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid7039725897
Reach Compliance Codenot_compliant
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; TR, 14 INCH
maximum descent time6 ns
Frequency Adjustment - MechanicalNO
frequency stability25%
JESD-609 codee3
Installation featuresSURFACE MOUNT
Number of terminals4
Nominal operating frequency28.7539 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS/TTL
Output load30 pF
physical size14.0mm x 9.8mm x 4.7mm
longest rise time6 ns
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceMatte Tin (Sn) - with Nickel (Ni) barrier
Ecliptek | EH14 Series Oscillator
http://www.ecliptek.com/oscillators/EH14/
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EH14 Series Oscillator
Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc J-Lead 9.8mm x 14.0mm Plastic Surface Mount (SMD)
2011/65 +
2015/863
168 SVHC
Revision F 08/14/2012
Electrical Specifications
Nominal Frequency
1.000MHz to 155.520MHz
Some frequencies within this range may not be available.
Frequency
Tolerance/Stability
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, First Year
Aging at 25°C, Shock, and Vibration)
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum
0°C to +70°C
-40°C to +85°C
5.0V
DC
±10%
No Load
50mA Maximum
2.4V
DC
Minimum with TTL Load, V
DD
-0.4V
DC
Minimum with HCMOS Load, IOH = -16mA
Operating Temperature
Range
Supply Voltage (V
DD
)
Input Current
Output Voltage Logic
High (V
OH
)
Output Voltage Logic
Low (V
OL
)
Duty Cycle
0.4V
DC
Maximum with TTL Load, 0.5V
DC
Maximum with HCMOS Load, IOL = +16mA
50 ±10(%)(Measured at 1.4V
DC
with TTL Load or 50% of waveform with HCMOS Load
over Nominal Frequency of 1MHz to 70MHz; Measured at 50% of waveform over Nominal
Frequency of 70.000001MHz to 155.52MHz)
50 ±5(%) (Measured at 50% of waveform with TTL Load or with HCMOS Load)
Measured at 0.8V
DC
to 2.0V
DC
with TTL Load; Measured at 20% to 80% of waveform
with HCMOS Load
6nSec Maximum over Nominal Frequency of 1MHz to 70MHz
4nSec Maximum over Nominal Frequency of 70.000001MHz to 155.52MHz
10TTL Load or 50pF HCMOS Load Maximum over Nominal Frequency of 1MHz to 70MHz
5TTL Load or 15pF HCMOS Load Maximum over Nominal Frequency of 70.000001MHz to
155.52MHz
CMOS
TTL
Tri-State (Disabled Output: High Impedance)
+2.2V
DC
Minimum to enable output, +0.8V
DC
Maximum to disable output (High
Impedance), No Connect to enable output.
±250pSec Maximum, ±100pSec Typical
±50pSec Maximum, ±30pSec Typical
Rise Time/Fall Time
Load Drive Capability
Output Logic Type
Pin 1 Connection
Tri-State Input Voltage
(Vih and Vil)
Absolute Clock Jitter
One Sigma Clock Period
Jitter
Aging (at 25°C)
±5ppm/year Maximum
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28-Jan-2016 1:02 PM

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