PS2BM27-225SABOOR-U datasheet, PDF

PS2BM27-225SABOOR-U: DescriptionBoard Connector, 50 Contact(s), 2 Row(s), Female, Straight, 0.079 inch Pitch, Surface Mount Terminal, Locking, Receptacle; CategoryThe connector The connector; File Size197KB，1 Pages; ManufacturerAmtek Technology Co., Ltd.; Environmental Compliance

Download Datasheet Parametric View All

PS2BM27-225SABOOR-U Overview

Board Connector, 50 Contact(s), 2 Row(s), Female, Straight, 0.079 inch Pitch, Surface Mount Terminal, Locking, Receptacle

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	1164596196
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	ROHS COMPLIANT
body width	0.157 inch
subject depth	0.083 inch
body length	1.969 inch
Body/casing type	RECEPTACLE
Connector type	BOARD CONNECTOR
Contact to complete cooperation	GOLD (5)
Contact completed and terminated	Gold (Au)
Contact point gender	FEMALE
Contact material	COPPER ALLOY
contact mode	RECTANGULAR
Contact resistance	20 mΩ
Contact style	SQ PIN-SKT
Dielectric withstand voltage	500VAC V
Insulation resistance	1000000000 Ω
insulator material	NYLON
JESD-609 code	e4
Manufacturer's serial number	PS2
Plug contact pitch	0.079 inch
Match contact row spacing	0.079 inch
Installation option 1	LOCKING
Installation method	STRAIGHT
Installation type	BOARD
Number of connectors	ONE
PCB row number	2
Number of rows loaded	2
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
PCB contact pattern	RECTANGULAR
PCB contact row spacing	5.1562 mm
Plating thickness	5u inch
polarization key	POLARIZED HOUSING
Rated current (signal)	2 A
Guideline	UL
reliability	COMMERCIAL
Terminal pitch	2.0066 mm
Termination type	SURFACE MOUNT
Total number of contacts	50

Selected FPGA tutorials: [font=微软雅黑][size=3][b]FPGA introductory tutorial collection[/b][/size][/font] [font=微软雅黑][size=3] [/size][/font] [font=微软雅黑][size=3]Altera FPGA design skills improvement training (Zhixin Technology): ...; EE大学堂 Training Edition

Purgatory Legend-RAM War: Purgatory Legend-RAM War...; 雷北城 EE_FPGA Learning Park

Computer Organization and Design: Hardware-Software Interface (RISC-V Edition): This book, co-authored by 2017 Turing Award winners Patterson and Hennessy, is a classic book in the field of computer architecture, emphasizing hardware-software co-design and its impact on performan...; arui1999 Download Centre

Please tell me how the following two circuit diagrams work: [i=s] This post was last edited by 空恋lz on 2019-3-14 21:10 [/i] How does Figure 1 convert the pwm signal into a voltage signal? What is the calculation process of Figure 2? How does voltage convert to...; 空恋lz Analog electronics

TI Smart Building Systems: Using mmWave to count and track people: If buildings can be truly intelligent, what kind of earth-shaking changes will it bring to our lives? Imagine if in a commercial building, you can know where people are, where they go, and whether the...; 火辣西米秀 RF/Wirelessly

　"POP" noise in audio system applications and its common solutions: "POP" noise in audio system applications and its common solutions 　"POP" noise refers to the popping sound caused by transient impacts caused by various operations when audio devices are powered on, p...; fighting Analog electronics

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components