BUK9207-30B
TrenchMOS™ logic level FET
M3D300
Rev. 02 — 12 December 2003
Product data
1. Product profile
1.1 Description
N-channel enhancement mode field-effect power transistor in a plastic package using
Philips High-Performance Automotive (HPA) TrenchMOS™ technology.
1.2 Features
s
Very low on-state resistance
s
185
°C
rated
s
Q101 compliant
s
Logic level compatible.
1.3 Applications
s
Automotive systems
s
Motors, lamps and solenoids
s
12 V loads
s
General purpose power switching.
1.4 Quick reference data
s
E
DS(AL)S
≤
329 mJ
s
I
D
≤
75 A
s
R
DSon
= 5.9 mΩ (typ)
s
P
tot
≤
167 W.
2. Pinning information
Table 1:
Pin
1
2
3
mb
Pinning - SOT428 (D-PAK), simplified outline and symbol
Simplified outline
[1]
Description
gate (g)
drain (d)
source (s)
mounting base;
connected to
drain (d)
Symbol
d
mb
g
s
MBB076
2
1
Top view
3
MBK091
SOT428 (D-PAK)
[1]
It is not possible to make connection to pin 2 of the SOT428 package.
Philips Semiconductors
BUK9207-30B
TrenchMOS™ logic level FET
3. Ordering information
Table 2:
Ordering information
Package
Name
BUK9207-30B
D-PAK
Description
Plastic single-ended surface mounted package (Philips version of D-PAK);
3 leads (one lead cropped).
Version
SOT428
Type number
4. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
DGR
V
GS
I
D
Parameter
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
T
mb
= 25
°C;
V
GS
= 5 V;
Figure 2
and
3
T
mb
= 100
°C;
V
GS
= 5 V;
Figure 2
I
DM
P
tot
T
stg
T
j
I
DR
I
DRM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
reverse drain current (DC)
peak reverse drain current
non-repetitive drain-source
avalanche energy
T
mb
= 25
°C
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs
unclamped inductive load; I
D
= 75 A;
V
DS
≤
30 V; V
GS
= 5 V; R
GS
= 50
Ω;
starting T
j
= 25
°C
[1]
[2]
[1]
[2]
[2]
Conditions
R
GS
= 20 kΩ
Min
-
-
-
-
-
-
-
-
−55
−55
-
-
-
-
Max
30
30
±15
112
75
75
449
167
+185
+185
112
75
449
329
Unit
V
V
V
A
A
A
A
W
°C
°C
A
A
A
mJ
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
mb
= 25
°C;
Figure 1
Source-drain diode
Avalanche ruggedness
[1]
[2]
Current is limited by power dissipation chip rating.
Continuous current is limited by package.
9397 750 12233
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 — 12 December 2003
2 of 12
Philips Semiconductors
BUK9207-30B
TrenchMOS™ logic level FET
120
Pder
(%)
80
03no96
150
ID
(A)
100
03nl00
40
50
Capped at 75A due to package
0
0
50
100
150
200
Tmb (°C)
0
0
50
100
150
200
Tmb (°C)
P
tot
P
der
=
----------------------
×
100%
-
P
°
tot
(
25 C
)
V
GS
≥
5 V
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Continuous drain current as a function of
mounting base temperature.
103
03nk98
ID
(A)
Limit RDSon = VDS / ID
tp = 10
µ
s
102
100
µ
s
Capped at 75 A due to package
1 ms
DC
10
10 ms
100 ms
1
10-1
1
10
VDS (V)
102
T
mb
= 25
°C;
I
DM
single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 12233
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 — 12 December 2003
3 of 12
Philips Semiconductors
BUK9207-30B
TrenchMOS™ logic level FET
5. Thermal characteristics
Table 4:
Symbol
R
th(j-a)
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance from junction to
ambient
thermal resistance from junction to
mounting base
Figure 4
Conditions
Min
-
-
Typ
71.4
-
Max
-
0.95
Unit
K/W
K/W
5.1 Transient thermal impedance
1
δ
= 0.5
Zth(j-mb)
(K/W)
03nk52
0.2
0.1
0.05
0.02
10-1
10-2
P
single shot
δ
=
tp
T
tp
T
10-3
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
t
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 12233
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 — 12 December 2003
4 of 12
Philips Semiconductors
BUK9207-30B
TrenchMOS™ logic level FET
6. Characteristics
Table 5:
Characteristics
T
j
= 25
°
C unless otherwise specified.
Symbol
V
(BR)DSS
Parameter
drain-source breakdown
voltage
Conditions
I
D
= 0.25 mA; V
GS
= 0 V
T
j
= 25
°C
T
j
=
−55 °C
V
GS(th)
gate-source threshold voltage I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°C
T
j
= 185
°C
T
j
=
−55 °C
I
DSS
drain-source leakage current
V
DS
= 30 V; V
GS
= 0 V
T
j
= 25
°C
T
j
= 185
°C
I
GSS
R
DSon
gate-source leakage current
drain-source on-state
resistance
V
GS
=
±15
V; V
DS
= 0 V
V
GS
= 5 V; I
D
= 25 A;
Figure 7
and
8
T
j
= 25
°C
T
j
= 185
°C
V
GS
= 4.5 V; I
D
= 25 A
V
GS
= 10 V; I
D
= 25 A
Dynamic characteristics
Q
g(tot)
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
L
d
L
s
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
internal drain inductance
internal source inductance
measured from drain to
center of die
measured from source lead
to source bond pad
I
S
= 25 A; V
GS
= 0 V;
Figure 15
I
S
= 20 A; dI
S
/dt =
−100
A/µs
V
GS
=
−10
V; V
DS
= 25 V
V
DS
= 25 V; R
L
= 1.2
Ω;
V
GS
= 5 V; R
G
= 10
Ω
V
GS
= 0 V; V
DS
= 25 V;
f = 1 MHz;
Figure 12
V
GS
= 5 V; V
DS
= 24 V;
I
D
= 25 A;
Figure 14
-
-
-
-
-
-
-
-
-
-
-
-
31
8
12
2573
635
268
19
82
100
107
2.5
7.5
-
-
-
3430
762
367
-
-
-
-
-
-
nC
nC
nC
pF
pF
pF
nS
nS
nS
nS
nH
nH
-
-
-
-
5.9
-
-
4.4
7
13.3
7.7
5
mΩ
mΩ
mΩ
mΩ
-
-
-
0.02
-
2
1
500
100
µA
µA
nA
1.1
0.4
-
1.5
-
-
2
-
2.3
V
V
V
30
27
-
-
-
-
V
V
Min
Typ
Max
Unit
Static characteristics
Source-drain diode
V
SD
t
rr
Q
r
9397 750 12233
source-drain (diode forward)
voltage
reverse recovery time
recovered charge
-
-
-
0.85
55
42
1.2
-
-
V
ns
nC
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 — 12 December 2003
5 of 12
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