W78E52C/W78E052C Data Sheet
8-BIT MICROCONTROLLER
Table of Contents-
1.
2.
3.
4.
5.
GENERAL DESCRIPTION ......................................................................................................... 2
FEATURES ................................................................................................................................. 2
PIN CONFIGURATIONS ............................................................................................................ 3
PIN DESCRIPTION..................................................................................................................... 4
FUNCTIONAL DESCRIPTION ................................................................................................... 5
5.1
5.2
5.3
5.4
5.5
5.6
6.
6.1
6.2
6.3
7.
7.1
7.2
7.3
8.
8.1
8.2
8.3
8.4
9.
9.1
9.2
10.
10.1
10.2
10.3
11.
Timers 0, 1, and 2........................................................................................................... 5
New Defined Peripheral.................................................................................................. 5
Watchdog Timer ............................................................................................................. 7
Clock ............................................................................................................................... 9
Power Management........................................................................................................ 9
Reset............................................................................................................................... 9
Lock Bit ......................................................................................................................... 10
MOVC Inhibit................................................................................................................. 10
Encryption ..................................................................................................................... 10
Absolute Maximum Ratings .......................................................................................... 11
D.C. Characteristics...................................................................................................... 11
A.C. Characteristics ...................................................................................................... 13
Program Fetch Cycle .................................................................................................... 16
Data Read Cycle........................................................................................................... 16
Data Write Cycle........................................................................................................... 17
Port Access Cycle......................................................................................................... 17
Expanded External Program Memory and Crystal ....................................................... 18
Expanded External Data Memory and Oscillator ......................................................... 19
40-pin DIP ..................................................................................................................... 20
44-pin PLCC ................................................................................................................. 20
44-pin PQFP ................................................................................................................. 21
SECURITY BITS ....................................................................................................................... 10
ELECTRICAL CHARACTERISTICS......................................................................................... 11
TIMING WAVEFORMS ............................................................................................................. 16
TYPICAL APPLICATION CIRCUITS ........................................................................................ 18
PACKAGE DIMENSIONS ......................................................................................................... 20
REVISION HISTORY ................................................................................................................ 22
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Publication Release Date: November 6, 2006
Revision A4
W78E52C/W78E052C
1. GENERAL DESCRIPTION
The W78E052C is an 8-bit microcontroller which can accommodate a wider frequency range with low
power consumption. The instruction set for the W78E052C is fully compatible with the standard 8051.
The W78E052C contains an 8K bytes Flash EPROM; a 256 bytes RAM; four 8-bit bi-directional and
bit-addressable I/O ports; an additional 4-bit I/O port P4; three 16-bit timer/counters; a hardware
watchdog timer and a serial port. These peripherals are supported by eight sources two-level interrupt
capability. To facilitate programming and verification, the Flash EPROM inside the W78E052C allows
the program memory to be programmed and read electronically. Once the code is confirmed, the user
can protect the code for security.
The W78E052C microcontroller has two power reduction modes, idle mode and power-down mode,
both of which are software selectable. The idle mode turns off the processor clock but allows for
continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power
consumption. The external clock can be stopped at any time and in any state without affecting the
processor.
2. FEATURES
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•
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Fully static design 8-bit CMOS microcontroller
Wide supply voltage of 4.5V to 5.5V
256 bytes of on-chip scratchpad RAM
8 KB On-chip Flash EPROM
64 KB program memory address space
64 KB data memory address space
Four 8-bit bi-directional ports
One extra 4-bit bit-addressable I/O port, additional
INT2
/
INT3
(available on 44-pin PLCC/QFP package)
Three 16-bit timer/counters
One full duplex serial port(UART)
Watchdog Timer
Eight sources, two-level interrupt capability
EMI reduction mode
Built-in power management
Code protection mechanism
Packages:
−
Lead Free (RoHS) DIP 40:
W78E052C40DL
−
Lead Free (RoHS) PLCC 44: W78E052C40PL
−
Lead Free (RoHS) PQFP 44: W78E052C40FL
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W78E52C/W78E052C
3. PIN CONFIGURATIONS
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Publication Release Date: November 6, 2006
Revision A4
W78E52C/W78E052C
4. PIN DESCRIPTION
SYMBOL
DESCRIPTIONS
EA
EXTERNAL ACCESS ENABLE:
This pin forces the processor to execute out of
external ROM. It should be kept high to access internal ROM. The ROM address and
data will not be presented on the bus if
EA
pin is high and the program counter is
within on-chip ROM area.
PROGRAM STORE ENABLE:
PSEN
enables the external ROM data onto the Port 0
address/ data bus during fetch and MOVC operations. When internal ROM access is
performed, no
PSEN
strobe signal outputs from this pin.
ADDRESS LATCH ENABLE:
ALE is used to enable the address latch that separates
the address from the data on Port 0.
RESET:
A high on this pin for two machine cycles while the oscillator is running resets
the device.
CRYSTAL1:
This is the crystal oscillator input. This pin may be driven by an external
clock.
CRYSTAL2:
This is the crystal oscillator output. It is the inversion of XTAL1.
GROUND:
Ground potential
POWER SUPPLY:
Supply voltage for operation.
PORT 0:
Port 0 is a bi-directional I/O port which also provides a multiplexed low order
address/data bus during accesses to external memory. The Port 0 is also an open-
drain port and external pull-ups need to be connected while in programming.
PORT 1:
Port 1 is a bi-directional I/O port with internal pull-ups. The bits have alternate
functions which are described below:
T2(P1.0): Timer/Counter 2 external count input
T2EX(P1.1): Timer/Counter 2 Reload/Capture control
PORT 2:
Port 2 is a bi-directional I/O port with internal pull-ups. This port also provides
the upper address bits for accesses to external memory.
PORT 3:
Port 3 is a bi-directional I/O port with internal pull-ups. All bits have alternate
functions, which are described below:
RXD(P3.0) : Serial Port receiver input
TXD(P3.1) : Serial Port transmitter output
PSEN
ALE
RST
XTAL1
XTAL2
V
SS
V
DD
P0.0−P0.7
P1.0−P1.7
P2.0−P2.7
P3.0−P3.7
INT0
(P3.2) : External Interrupt 0
INT1
(P3.3) : External Interrupt 1
T0(P3.4) : Timer 0 External Input
T1(P3.5) : Timer 1 External Input
WR
(P3.6) : External Data Memory Write Strobe
RD
(P3.7) : External Data Memory Read Strobe
P4.0-P4.3
PORT 4:
Another bit-addressable bidirectional I/O port P4. P4.3 and P4.2 are alternative
function pins. It can be used as general I/O port or external interrupt input sources
(
INT2
/
INT3
).
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W78E52C/W78E052C
5. FUNCTIONAL DESCRIPTION
The W78E052C architecture consists of a core controller surrounded by various registers, five general
purpose I/O ports, 256 bytes of RAM, three timer/counters, and a serial port. The processor supports
111 different opcodes and references both a 64K program address space and a 64K data storage
space.
5.1 Timers 0, 1, and 2
Timers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0,
TL1 and TH1 for Timer 1, and TL2 and TH2 for Timer 2. The TCON and TMOD registers provide
control functions for timers 0 and 1. The T2CON register provides control functions for Timer 2.
RCAP2H and RCAP2L are used as reload/capture registers for Timer 2.
The operations of Timer 0 and Timer 1 are the same as in the W78C51. Timer 2 is a special feature of
the W78E54B: it is a 16-bit timer/counter that is configured and controlled by the T2CON register. Like
Timers 0 and 1, Timer 2 can operate as either an external event counter or as an internal timer,
depending on the setting of bit C/T2 in T2CON. Timer 2 has three operating modes: capture, auto-
reload, and baud rate generator. The clock speed at capture or auto-reload mode is the same as that
of Timers 0 and 1.
5.2 New Defined Peripheral
In order to be more suitable for I/O, an extra 4-bit bit-addressable port P4 and two external interrupt
INT2
,
INT3
has been added to either the PLCC or QFP 44 pin package. And description follows:
INT2
/
I
NT3
Two additional external interrupts,
INT2
and
INT3
, whose functions are similar to those of external
interrupt 0 and 1 in the standard 80C52. The functions/status of these interrupts are
determined/shown by the bits in the XICON (External Interrupt Control) register. The XICON register is
bit-addressable but is not a standard register in the standard 80C52. Its address is at 0C0H. To
set/clear bits in the XICON register, one can use the "SETB (/CLR) bit" instruction. For example,
"SETB 0C2H" sets the EX2 bit of XICON.
XICON - external interrupt control (C0H)
PX3
EX3
IE3
IT3
PX2
EX2
IE2
IT2
PX3: External interrupt 3 priority high if set
EX3: External interrupt 3 enable if set
IE3: If IT3 = 1, IE3 is set/cleared automatically by hardware when interrupt is detected/serviced
IT3: External interrupt 3 is falling-edge/low-level triggered when this bit is set/cleared by software
PX2: External interrupt 2 priority high if set
EX2: External interrupt 2 enable if set
IE2: If IT2 = 1, IE2 is set/cleared automatically by hardware when interrupt is detected/serviced
IT2: External interrupt 2 is falling-edge/low-level triggered when this bit is set/cleared by software
Publication Release Date: November 6, 2006
Revision A4
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