MITSUBISHI (Dig./Ana. INTERFACE)
M62376GP
8-BIT 12CH D-A CONVERTER IC BUILT-IN 12-BIT I/O EXPANDER
DESCRIPTION
The M62376GP is a semiconductor IC that adopts a CMOS
structure having 12-channel of 8-bit D-A converter and 12-bit I/O
expander. The IC has achieved a wide operation range of 2.7V to
5.5V in power voltage.
Data is easily available via 3-wire combination system serial input
of SI, CLK and EN. The IC also provides an SO pin enabling
cascade connection. It provides 8 pins that share D-A converter
and I/O ports that can be arbitrarily switched with serial
input data.
PIN CONFIGURATION (TOP VIEW)
A1 1
A2 2
A3 3
A4 4
D11/A5 5
D10/A6 6
D9/A7
D8/A8
7
8
9
24 GND
23 REST
22 EN
21 SO
20 SI
19 CLK
18 D0
17 D1
16 D2
15 D3
14 V
CC
13 V
DD
FEATURES
Supply voltage 2.7 to 5.5V
Adopts 4 special ports for each of DAC and I/O and 8 ports that
share DAC output and I/O.
Each port can be set by serial data for input/output status.
Built-in power-on reset where D-A output is set to "L" in the
initial status and I/O goes to Hi-impedance when power is
turned on.
Small package of 0.65mm pitch and 24 pin.
D7/A9
D6/A10 10
D5/A11 11
D4/A12 12
Outline 24P2E-A
APPLICATION
Adjustment/control of industrial or home-use electronic equipment,
such as VCR camera, VCR set, TV, and CRT display.
BLOCK DIAGRAM
RESET
23
SI
EN
CLK
20
22
19
CLOCK
CONTROL
CIRCUIT
V
DD
13
V
CC
14
GND
24
SHIFT REGISTER
21 SO
S5
S4
S3
S2
S1
S0
S15 S14 S13 S12 S11 S10 S9
S8
S7
S6
DECODER
8-BIT
LATCH
8-BIT D-A
CONVERTER
•••
8-BIT
LATCH
8-BIT D-A
CONVERTER
8-BIT
LATCH
8-BIT D-A
CONVERTER
••••••
8-BIT
LATCH
8-BIT D-A
CONVERTER
Amp. Hi-Z
8-BIT LATCH
I/O SELECT
12-BIT LATCH
•••
••••••
(12)
•••
A1
A4
A5
••••••
A12
••••••
••••••
OUTPUT DATA 8-BIT LATCH
OUTPUT DATA 4-BIT LATCH
1
A1
•••
4
A4
5
D11/A5
••••••
12
D4/A12
15
D3
••••••
18
D0
MITSUBISHI (Dig./Ana. INTERFACE)
M62376GP
8-BIT 12CH D-A CONVERTER IC BUILT-IN 12-BIT I/O EXPANDER
EXPLANATION OF TERMINALS
Pin No.
20
21
Symbol
SI
SO
CLK
EN
A1
A2
A3
A4
D11/A5
D10/A6
D9/A7
D8/A8
D7/A9
D6/A10
D5/A11
D4/A12
D0
D1
D2
D3
V
CC
GND
V
DD
RESET
Function
Serial data input pin. Enters serial data of 16-bit in length.
Outputs data from 16-bit shift register that reads serial data or parallel data.
Shift clock input pin. At the rise of shift clock, input signal from the SI pin is entered into the 16-bit
shift register.
Entry of low level into the EN pin starts to read data.
Putting 16-bit data at high level after input loads the input data to a specified register.
19
22
1
2
3
4
5
6
7
8
9
10
11
12
18
17
16
15
14
24
13
23
Special output pin for 8-bit D-A converter (DAC)
Pin that shares I/O and DAC output.
Settings can be selected with serial data.
D4 to D11 are connected to the V
DD
power supply.
Digital input output pin.
Digital block power supply pin.
GND pin
Power supply pin in analog block and reference voltage input pin on the upper side of D-A converter
RESET pin
MITSUBISHI (Dig./Ana. INTERFACE)
M62376GP
8-BIT 12CH D-A CONVERTER IC BUILT-IN 12-BIT I/O EXPANDER
EXPLANATION OF TERMINALS BLOCK DIAGRAM
V
DD
13
EN 22
CLOCK
CONTROL
V
CC
14
GND
24
[1110]
CLK 19
SI 20
POWER ON
RESET
Di11 Di10 Di9 Di8 Di7 Di6 Di5 Di4 Di3 Di2 Di1 Di0
EN
SHIFT REGISTER
CLK
S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4
21 SO
S3
S2
S1
S0
RESET 23
LEVEL SHIFT
LEVEL SHIFT
EN
DECODER (12)
DECODER (4)
EN
•••••
[0000]
8-BIT
LATCH
8-BIT D-A
CONVERTER
•••
8-BIT
LATCH
8-BIT D-A
CONVERTER
8-BIT
LATCH
8-BIT D-A
CONVERTER
••••••
8-BIT
LATCH
8-BIT D-A
CONVERTER
8-BIT
LATCH
[11010000]
(A5 to A12 Hi-Z)
[1111]
•••
••••••
(8)
•••
A1
A4
A5
••••••
A12
LEVEL SHIFT
LEVEL
SHIFT
(8)
12-BIT
LATCH
(12)
[1101]
LATCH
(8)
1
A1
•••
4
A4
5
D11/A5
••••••
12
D4/A12
15
D3
LATCH
16
D2
17
D1
18
D0
(4)
MITSUBISHI (Dig./Ana. INTERFACE)
M62376GP
8-BIT 12CH D-A CONVERTER IC BUILT-IN 12-BIT I/O EXPANDER
DATA STRUCTURE
Serial data
MSB
S15
S14
S13
S12
S11
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
LSB
S0
Data for DAC and I/O expander
Address data
Address data
S3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
S2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Setup
(a)
A1 selection
A2 selection
A3 selection
A4 selection
A5 selection
A6 selection
A7 selection
A8 selection
A9 selection
A10 selection
A11 selection
A12 selection
I/O expander
(serial
parallel conversion)
I/O expander
(parallel
serial conversion)
I/O expander status setup
• I/O expander (serial
parallel conversion)
Outputs data on S4 to S15 to pins D0 to D11.
S3
1
S2
1
S1
0
S0
1
• I/O expander (parallel
serial conversion)
Writes data on D0 to D11 pins into S4 to S15.
When next data communication is provided, outputs data
sequentially from SO pin at the rise of the shift clock (CLK).
S3
1
S2
1
S1
1
S0
0
• I/O expander status setup register
Sets input/output pin of I/O expanders.
Data
"0": Input mode (Hi-Z status)
"1": Output mode
S3
1
S2
1
S1
1
S0
1
Data
S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4
Pin
DAC data
S15
0
0
0
1
1
X
X :Don't care
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
S14
0
0
0
1
1
X
S13
0
0
0
1
1
X
S12
0
0
0
1
1
X
S11
0
0
0
1
1
X
S10
0
0
0
1
1
X
S9
0
0
1
1
1
X
S8
0
1
0
0
1
X
S7
X
X
X
X
X
X
S6
X
X
X
X
X
X
S5
X
X
X
X
X
X
S4
0
0
0
0
0
1
(*)
Analog output voltage (Reference
voltage on the lower side=0.0V fixed)
(V
DD
/256)X1 [V] (1LSB)
(V
DD
/256)X2 [V] (2LSB)
(V
DD
/256)X3 [V] (3LSB)
(V
DD
/256)X255 [V] (255LSB)
V
DD
[V]
(256LSB)
High-impedance (I/O expander selected)
(*): Only A5 to A12 outputs are available for DAC output by S4 and Hi-Z conversion.
(a) Command to set DAC output to High-impedance (DACHiZ command)
S15
X
S14
X
S13
X
S12
X
S11
X
S10
X
S9
X
S8
X
S7
1
S6
1
S5
0
S4
1
S3
0
S2
0
S1
0
S0
0
Analog output voltage
Sets D-A output of A5 to A12
to High-impedance.
MITSUBISHI (Dig./Ana. INTERFACE)
M62376GP
8-BIT 12CH D-A CONVERTER IC BUILT-IN 12-BIT I/O EXPANDER
(b) Initial status just after power is turned on:
Low level output from A1 to A4 (set to [00]h)
D4/A12 to D11/A5: DAC output of High-impedance (Hi-Z), I/O
of input mode (Hi-Z)
D0 to D3
:input mode (Hi-Z)
Note: To change the status of pins D4/A12 to D11/A5, switch both analog
and digital after setup of High-impedance.
(c) The DACHiZ command is effective only for DAC settings (A5
to A12), but not for the I/O ports (D0 to D11)
TIMING CHART (MODEL)
EN
•••
CLK
•••
•••
SI
PARALLEL INPUT
D0 to
( SERIAL OUTPUT) D11
(SERIAL INPUT )
D0 to
PARALLEL OUTPUT
D11
H-Z
S0
n-1
•••
S15
n-1
S0
n
S1
n
S2
n
S3 •••
S12 S13 S14 S15
n
n
n
n
•••
•••
SO
S15 S0 •••
n-3
n-2
S15
n-2
H-Z
S15 S0 S1 S2 S3 •••
n-2
n-1
n-1
n-1
n-1
S12 S13 S14 S15
n-1
n-1
n-1
H-Z
A1 to A12
•••
•••
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
DD
V
IN
V
out
V
IN
V
out
P
d
T
opr
T
stg
Parameter
Digital supply voltage
Analog supply
(D-A converter upper reference voltage)
Input voltage
Output voltage
Input voltage
Output voltage
Power dissipation
Operating temperature
Storage temperature
Conditions
Ratings
-0.3 to 7.0
-0.3 to 7.0
V
CC
supply side pin
V
CC
supply side pin
V
DD
supply side pin
V
DD
supply side pin
-0.3 to V
CC
+0.3
-0.3 to V
CC
+0.3
-0.3 to V
DD
+0.3
-0.3 to V
DD
+0.3
200
-20 to +85
-40 to +125
Unit
V
V
V
V
V
V
mW
˚C
˚C
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