a
FEATURES
High Accuracy, Surpasses 50 Hz/60 Hz IEC 687/1036
Less than 0.1% Error over a Dynamic Range of 500 to 1
Supplies Average Real Power on the Frequency
Outputs F1 and F2
High-Frequency Output CF Is Intended for Calibration
and Supplies Instantaneous Real Power
Continuous Monitoring of the Phase and Neutral
Current Allows Fault Detection in 2-Wire
Distribution Systems
ADE7751 Uses the Larger of the Two Currents (Phase
or Neutral) to Bill—Even During a Fault Condition
Two Logic Outputs (FAULT and REVP) Can Be Used to
Indicate a Potential Miswiring or Fault Condition
Direct Drive for Electromechanical Counters and
2-Phase Stepper Motors (F1 and F2)
A PGA in the Current Channel Allows the Use of Small
Values of Shunt and Burden Resistance
Proprietary ADCs and DSP Provide High Accuracy over
Large Variations in Environmental Conditions and Time
On-Chip Power Supply Monitoring
On-Chip Creep Protection (No Load Threshold)
On-Chip Reference 2.5 V 8% (30 ppm/ C Typical)
with External Overdrive Capability
Single 5 V Supply, Low Power (15 mW Typical)
Low-Cost CMOS Process
GENERAL DESCRIPTION
Energy Metering IC
with On-Chip Fault Detection
ADE7751
*
The only analog circuitry used in the ADE7751 is in the ADCs
and reference circuit. All other signal processing (e.g., multipli-
cation and filtering) is carried out in the digital domain. This
approach provides superior stability and accuracy over extremes
in environmental conditions and over time.
The ADE7751 incorporates a novel fault detection scheme that
warns of fault conditions and allows the ADE7751 to continue
accurate billing during a fault event. The ADE7751 does this
by continuously monitoring both the phase and neutral (return)
currents. A fault is indicated when these currents differ by more
than 12.5%. Billing is continued using the larger of the two currents.
The ADE7751 supplies average real power information on the
low-frequency outputs F1 and F2. These logic outputs may be
used to directly drive an electromechanical counter or interface
to an MCU. The CF logic output gives instantaneous real power
information. This output is intended to be used for calibration purposes.
The ADE7751 includes a power supply monitoring circuit on the
AV
DD
supply pin. The ADE7751 will remain in a reset condition
until the supply voltage on AV
DD
reaches 4 V. If the supply falls
below 4 V, the ADE7751 will also be reset and no pulses will be
issued on F1, F2, and CF.
Internal phase matching circuitry ensures that the voltage and
current channels are matched whether the HPF in Channel 1 is
on or off. The ADE7751 also has anticreep protection.
The ADE7751 is available in 24-lead DIP and SSOP packages.
The ADE7751 is a high-accuracy, fault-tolerant electrical energy
measurement IC that is intended for use with 2-wire distribution
systems. The part specifications surpass the accuracy require-
ments as quoted in the IEC1036 standard.
FUNCTIONAL BLOCK DIAGRAM
G0 G1
AV
DD
AGND
FAULT
AC/DC
DV
DD
DGND
ADE7751
POWER
SUPPLY MONITOR
A<>B
V1A
V1N
V1B
1,
V2P
V2N
4k
2.5V
REFERENCE
1,
PGA
2, 8,
ADC
16
ADC
PGA
2, 8,
16
ADC
SIGNAL
PROCESSING
BLOCK
HPF
...
110101
...
A
A>B
...
110101
...
B
B>A
PHASE
CORRECTION
MULTIPLIER
LPF
...
11011001
...
DIGITAL-TO-FREQUENCY
CONVERTER
REF
IN/OUT
CLKIN CLKOUT SCF S0 S1 REVP CF F1 F2
RESET
*US
Patent 5,745,323; 5,760,617; 5,862,069; 5,872,469.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
ADE7751–SPECIFICATIONS
Parameter
ACCURACY
3
Measurement Error
1
on Channels 1 and 2
Gain = 1
Gain = 2
Gain = 8
Gain = 16
Phase Error
1
between Channels
V1 Phase Lead 37°
(PF = 0.8 Capacitive)
V1 Phase Lag 60°
(PF = 0.5 Inductive)
AC Power Supply Rejection
1
Output Frequency Variation (CF)
DC Power Supply Rejection
1
Output Frequency Variation (CF)
FAULT DETECTION
1, 4
Fault Detection Threshold
Inactive i/p <> Active i/p
Input Swap Threshold
Inactive i/p > Active i/p
Accuracy Fault Mode Operation
V1A Active, V1B = AGND
V1B Active, V1A = AGND
Fault Detection Delay
Swap Delay
Value
0.1
0.1
0.1
0.1
1, 2
(AV
DD
= DV
DD
= 5 V 5%, AGND = DGND = 0 V, On-Chip Reference,
CLKIN = 3.58 MHz, T
MIN
to T
MAX
= –40 C to +85 C.)
Test Conditions/Comments
One Channel with Full-Scale Signal (±660 mV)
Over a Dynamic Range 500 to 1
Over a Dynamic Range 500 to 1
Over a Dynamic Range 500 to 1
Over a Dynamic Range 500 to 1
Line Frequency = 45 Hz to 55 Hz
AC/DC = 0 and AC/DC = 1
AC/DC = 0 and AC/DC = 1
AC/DC = 1, S0 = S1 = 1, G0 = G1 = 0
V1 = 100 mV rms, V2 = 100 mV rms @ 50 Hz
Ripple on AV
DD
of 200 mV rms @ 100 Hz
AC/DC = 1, S0 = S1 = 1, G0 = G1 = 0
V1 = 100 mV rms, V2 = 100 mV rms,
AV
DD
= DV
DD
= 5 V
±
250 mV
See Fault Detection Section
Unit
% Reading typ
% Reading typ
% Reading typ
% Reading typ
±
0.1
±
0.1
0.2
Degrees(°) max
Degrees(°) max
% Reading typ
±
0.3
% Reading typ
12.5
14
0.1
0.1
3
3
% typ
% of Active typ
% Reading typ
% Reading typ
Second typ
Second typ
(V1A or V1B Active)
(V1A or V1B Active)
Over a Dynamic Range 500 to 1
Over a Dynamic Range 500 to 1
ANALOG INPUTS
Maximum Signal Levels
Input Impedance (DC)
Bandwidth
ADC Offset Error
1
Gain Error
1
Gain Error Match
1
REFERENCE INPUT
REF
IN/OUT
Input Voltage Range
Input Impedance
Input Capacitance
ON-CHIP REFERENCE
Reference Error
Temperature Coefficient
CLKIN
Input Clock Frequency
LOGIC INPUTS
4
SCF, S0, S1, AC/DC,
RESET,
G0, and G1
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
±
1
390
14
±
25
±
10
±
0.4
2.7
2.3
3.2
10
±
200
±
30
4
1
V max
kΩ min
kHz typ
mV max
% Ideal typ
% Ideal typ
V max
V min
kΩ min
pF max
mV max
ppm/°C typ
See Analog Inputs Section
V1A, V1B, V1N, V2N, and V2P to AGND
CLKIN = 3.58 MHz
CLKIN/256, CLKIN = 3.58 MHz
See Terminology and Typical Performance
Characteristics
External 2.5 V Reference, Gain = 1,
V1 = V2 = 660 mV dc
External 2.5 V Reference
2.5 V + 8%
2.5 V – 8%
Nominal 2.5 V
Note All Specifications for CLKIN of 3.58 MHz
MHz max
MHz min
2.4
0.8
±
3
V min
V max
µA
max
DV
DD
= 5 V
±
5%
DV
DD
= 5 V
±
5%
Typically 10 nA, V
IN
= 0 V to DV
DD
Input Capacitance, C
IN
10
pF max
–2–
REV. 0
ADE7751
Parameter
Value
Unit
Test Conditions/Comments
LOGIC OUTPUTS
4
F1 and F2
Output High Voltage, V
OH
4.5
Output Low Voltage, V
OL
0.5
CF, FAULT, and REVP
Output High Voltage, V
OH
4
Output Low Voltage, V
OL
0.5
POWER SUPPLY
AV
DD
DV
DD
AI
DD
DI
DD
4.75
5.25
4.75
5.25
3
2.5
V max
V min
V max
V min
V max
mA max
mA max
V min
V max
V min
I
SOURCE
= 10 mA
DV
DD
= 5 V
I
SINK
= 10 mA
DV
DD
= 5 V
I
SOURCE
= 5 mA
DV
DD
= 5 V
I
SINK
= 5 mA
DV
DD
= 5 V
For Specified Performance
5 V – 5%
5 V + 5%
5 V – 5%
5 V + 5%
Typically 2 mA
Typically 1.5 mA
NOTES
1
See Terminology section for explanation of specifications.
2
See plots in Typical Performance Characteristics graphs.
3
See Fault Detection section of data sheet for explanation of fault detection functionality.
4
Sample tested during initial release and after any redesign or process change that may affect this parameter.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
Parameter
t
1 3
t
2
t
3
t
4 3
t
5
t
6
Value
1, 2
(AV
DD
= DV
DD
= 5 V
5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58 MHz,
T
MIN
to T
MAX
= –40 C to +85 C.)
Unit
ms
sec
sec
ms
sec
sec
Test Conditions/Comments
F1 and F2 Pulsewidth (Logic Low)
Output Pulse Period. See Transfer Function section.
Time Between F1 Falling Edge and F2 Falling Edge
CF Pulsewidth (Logic High)
CF Pulse Period. See Transfer Function section.
Minimum Time Between F1 and F2 Pulse
275
See Table III
1/2 t
2
90
See Table IV
CLKIN/4
NOTES
1
Sample tested during initial release and after any redesign or process change that may affect this parameter.
2
See Figure 1.
3
The pulsewidths of F1, F2, and CF are not fixed for higher output frequencies. See Frequency Outputs F1 and F2 section.
Specifications subject to change without notice.
t
1
F1
.t
6
.
t
2
F2
t
4
CF
.t
3
.t
5
Figure 1. Timing Diagram for Frequency Outputs
REV. 0
–3–
ADE7751
ABSOLUTE MAXIMUM RATINGS*
(T
A
= 25°C, unless otherwise noted.)
ORDERING GUIDE
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to AV
DD
. . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Analog Input Voltage to AGND
V1A, V1B, V1N, V2P, and V2N . . . . . . . . . . –6 V to +6 V
Reference Input Voltage to AGND . . –0.3 V to AV
DD
+ 0.3 V
Digital Input Voltage to DGND . . . . –0.3 V to DV
DD
+ 0.3 V
Digital Output Voltage to DGND . . . –0.3 V to DV
DD
+ 0.3 V
Operating Temperature Range
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
24-Lead Plastic DIP, Power Dissipation . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 105°C/W
Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . 260°C
24-Lead SSOP, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 112°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
Model
ADE7751AN
ADE7751ARS
ADE7751ARSRL
Package Description
Plastic DIP
Shrink Small Outline Package
Shrink Small Outline Package
in Reel
Package
Option
N-24
RS-24
RSRL-24
EVAL-ADE7751EB ADE7751 Evaluation Board
ADE7751AAN-REF ADE7751 Reference Design
PCB (See AN-563)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADE7751 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. 0
ADE7751
PIN CONFIGURATION
DV
DD
AV
DD
1
24
23
22
21
F1
F2
CF
DGND
REVP
AC/DC
2
3
V1A
4
V1B
5
V1N
6
ADE7751
20
TOP VIEW
19
FAULT
(Not to Scale)
V2N
7
18
CLKOUT
V2P
8
RESET
9
REF
IN/OUT 10
AGND
11
SCF
12
17
16
15
14
13
CLKIN
G0
G1
S0
S1
PIN FUNCTION DESCRIPTIONS
Pin No.
1
Mnemonic
DV
DD
Description
Digital Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7751.
The supply voltage should be maintained at 5 V
±
5% for specified operation. This pin should be
decoupled with a 10
µF
capacitor in parallel with a ceramic 100 nF capacitor.
High-Pass Filter Select. This logic input is used to enable the HPF in Channel 1 (the current
channel). A Logic 1 on this pin enables the HPF. The associated phase response of this filter has
been internally compensated over a frequency range of 45 Hz to 1 kHz. The HPF filter should be
enabled in energy metering applications.
Analog Power Supply. This pin provides the supply voltage for the analog circuitry in the ADE7751.
The supply should be maintained at 5 V
±
5% for specified operation. Every effort should be made
to minimize power supply ripple and noise at this pin by the use of proper decoupling. This pin
should be decoupled to AGND with a 10
µF
capacitor in parallel with a ceramic 100 nF capacitor.
Analog Inputs for Channel 1 (Current Channel). These inputs are fully differential voltage inputs
with a maximum signal level of
±
660 mV with respect to pin V1N for specified operation. The
maximum signal level at these pins is
±
1 V with respect to AGND. Both inputs have internal ESD
protection circuitry and an overvoltage of
±
6 V can also be sustained on these inputs without risk of
permanent damage.
Negative Input Pin for Differential Voltage Inputs V1A and V1B. The maximum signal level at this
pin is
±1
V with respect to AGND. The input has internal ESD protection circuitry and an overvoltage
of
±
6 V can also be sustained without risk of permanent damage. This input should be directly con-
nected to the burden resistor and held at a fixed potential, i.e., AGND. See Analog Input section.
Negative and Positive Inputs for Channel 2 (Voltage Channel). These inputs provide a fully differ-
ential input pair. The maximum differential input voltage is
±
660 mV for specified operation. The
maximum signal level at these pins is
±
1 V with respect to AGND. Both inputs have internal ESD
protection circuitry and an overvoltage of
±
6 V can also be sustained on these inputs without risk of
permanent damage.
Reset Pin for the ADE7751. A logic low on this pin will hold the ADCs and digital circuitry in a
reset condition. Bringing this pin logic low will clear the ADE7751 internal registers.
Provides Access to the On-Chip Voltage Reference. The on-chip reference has a nominal value of
2.5 V
±
8% and a typical temperature coefficient of 30 ppm/°C. An external reference source may also
be connected at this pin. In either case, this pin should be decoupled to AGND with a 1
µF
ceramic
capacitor and 100 nF ceramic capacitor.
Provides the Ground Reference for the Analog Circuitry in the ADE7751, i.e., ADCs and Refer-
ence. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is
the ground reference for all analog circuitry, e.g., antialiasing filters, current and voltage trans-
ducers, and more. For good noise suppression, the analog ground plane should only be connected to
the digital ground plane at one point. A star ground configuration will help to keep noisy digital
return currents away from the analog circuits.
Select Calibration Frequency. This logic input is used to select the frequency on the calibration
output CF. Table IV shows how the calibration frequencies are selected.
2
AC/DC
3
AV
DD
4, 5
V1A, V1B
6
V1N
7, 8
V2N, V2P
9
10
RESET
REF
IN/OUT
11
AGND
12
SCF
REV. 0
–5–
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