www.murata-ps.com
ADS-118, ADS-118A
12-Bit, 5MHz, Low-Power Sampling A/D Converters
PRODUCT OVERVIEW
DATEL's ADS-118 and ADS-118A are 12-bit,
5MHz, sampling A/D converters packaged in
space-saving 24-pin DDIP’s. The ADS-118 offers
an input range of ±1V and has three-state outputs.
The ADS-118A has an input range of ±1.25V and
features direct adjustment of offset error.
These functionally complete low-power devices
(1.8 Watts) contain an internal fast-settling sample/
hold amplifier, a 12-bit subranging A/D converter,
a precise voltage reference, timing/control logic,
and error-correction circuitry. All timing and control
logic operates from the rising edge of a single start
convert pulse. Digital input and output levels are
TTL. Models are available for use in either com-
mercial (0 to +70°C) or military (–55 to +125°C)
operating temperature ranges.
Applications include radar, transient signal
analysis, process control, medical/graphic imaging,
and FFT spectrum analysis.
INPUT/OUTPUT CONNECTIONS
FUNCTION
PIN FUNCTION
BIT 12 (LSB)
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1 (MSB)
24
23
22
21
20
19
18
17*
16
15
14
13
NO CONNECTION
ANALOG GROUND
NO CONNECTION
+5V ANALOG SUPPLY
–5V SUPPLY
ANALOG INPUT
ANALOG GROUND
ENABLE/OFFSET ADJ.
START CONVERT
EOC
DIGITAL GROUND
+5V DIGITAL SUPPLY
FEATURES
■
■
■
■
■
■
■
■
12-bit resolution
5MHz minimum sampling rate
Functionally complete
Small 24-pin DDIP
Requires only ±5V supplies
Low-power, 1.8 Watts
Outstanding dynamic performance
No missing codes over full military temperature
range
Edge-triggered, no pipeline delay
Ideal for both time and frequency-domain
applications
BLOCK DIAGRAM
PIN
1
2
3
4
5
6
7
8
9
10
11
12
■
■
* ADS-118, Pin 17 is ENABLE
ADS-118A, Pin 17 is OFFSET ADJUST
OFFSET ADJUST 17
(ADS-118A only)
BUFFER
S/H
+
FLASH
ADC
1
REGISTER
ANALOG INPUT 19
–
17 ENABLE
(ADS-118A only)
12 BIT 1 (MSB)
11 BIT 2
DIGITAL CORRECTION LOGIC
3-STATE OUTPUT REGISTER
10 BIT 3
9
8
7
6
5
4
3
2
1
BIT 4
BIT 5
BIT 6
BIT 7
BIT 9
BIT 9
BIT 10
BIT 11
BIT 12 (LSB)
REF
S
DAC
AMP
FLASH
ADC
2
START CONVERT 16
EOC 15
TIMING AND
CONTROL LOGIC
21
REGISTER
13
+5V DIGITAL
SUPPLY
14
DIGITAL
GROUND
20
–5V SUPPLY
18, 23
ANALOG
GROUND
22, 24
NO CONNECT
+5V ANALOG
SUPPLY
For full details go to
www.murata-ps.com/rohs
Figure 1. ADS-118/118A Functional Block Diagram
www.murata-ps.com
Technical enquiries
email: data.acquisition@murata-ps.com, tel:
+1 508 339 3000
MDA_ADS-118.B02
Page 1 of 9
ADS-118, ADS-118A
12-Bit, 5MHz, Low-Power Sampling A/D Converters
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
LIMITS
+5V Supply (Pins 13, 21)
0 to +6
–5V Supply (Pin 20)
0 to –6
Digital Input (Pin 16, 17)
–0.3 to +VDD +0.3
Analog Input (Pin 19)
±5
Lead Temperature (10 seconds)
+300
UNITS
Volts
Volts
Volts
Volts
°C
PHYSICAL/ENVIRONMENTAL
PARAMETERS
MIN.
TYP.
MAX.
UNITS
Operating Temp. Range, Case
ADS-118/118AMC
0
—
+70
°C
ADS-118/118AMM, GM, 883
–55
—
+125
°C
Thermal Impedance
θjc
—
2
—
°C/Watt
θca
—
23
—
°C/Watt
Storage Temperature Range
–65
—
+150
°C
Package Type
24-pin, metal-sealed, ceramic DDIP or SMT
Weight
0.42 ounces (12 grams)
FUNCTIONAL SPECIFICATIONS
(T
A
= +25°C, ±V
DD
= ±5V, 5MHz sampling rate, and a minimum 3 minute warmup
➀
unless otherwise specified.)
+25°C
ANALOG INPUT
Input Voltage Range, ADS-118
➁
Input Resistance
Input Capacitance
DIGITAL INPUT
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Start Convert Positive Pulse Width
➂
STATIC PERFORMANCE
Resolution
Integral Nonlinearity (f
in
= 10kHz)
Differential Nonlinearity (f
in
= 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error (Tech Note 2)
Bipolar Offset Error (Tech Note 2)
Gain Error (Tech Note 2)
No Missing Codes (f
in
= 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 2.5MHz
Total Harmonic Distortion (–0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 2.5MHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 2.5MHz
Signal-to-Noise Ratio
➃
(& distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 2.5MHz
Noise
Two-tone Intermodulation
Distortion (f
in
= 1MHz,
975kHz, f
s
= 5MHz, –0.5dB)
Input Bandwidth (–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Feedthrough Rejection (f
in
= 2.5MHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
MIN.
—
475
—
TYP.
±1
500
6
MAX.
—
—
15
MIN.
—
475
—
0 TO +70°C
TYP.
±1
500
6
MAX.
—
—
15
MIN.
—
475
—
–55 TO +125°C
TYP.
±1
500
6
MAX.
—
—
15
UNITS
Volts
Ω
pF
+2.0
—
—
—
50
—
—
—
—
—
—
—
12
—
—
—
—
100
12
±0.75
±0.5
±0.1
±0.1
±0.1
±0.1
—
—
+0.8
+20
–20
—
—
—
+0.75
±0.5
±0.5
±0.5
±0.5
—
+2.0
—
—
—
50
—
—
—
—
—
—
—
12
—
—
—
—
100
12
±1.0
±0.5
±0.5
±0.5
±0.5
±0.5
—
—
+0.8
+20
–20
—
—
—
±0.95
±0.75
±0.85
±1.5
±1.0
—
+2.0
—
—
—
50
—
—
—
—
—
—
—
12
—
—
—
—
100
12
±1.5
±0.75
±0.75
±0.85
±1.5
±1.0
—
—
+0.8
+20
–20
—
—
—
+0.95
±1.5
±2.0
±2.5
±2.5
—
Volts
Volts
μA
μA
ns
Bits
LSB
LSB
%FSR
%FSR
%FSR
%
Bits
—
—
—
—
—
—
67
66
66
65
65
64
—
—
—
—
—
—
—
—
–76
–75
–69
–72
–71
–70
69
69
69
68
68
67
195
–74
20
10
80
±400
+10
3
–71
–71
–69
–68
–67
–66
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
66
65
65
64
64
63
—
—
—
—
—
—
—
—
–74
–74
–73
–71
–70
–69
69
68
68
67
67
66
195
–74
20
10
80
±400
+10
3
–70
–70
–67
–67
–66
–65
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
64
63
63
62
61
60
—
—
—
—
—
—
—
—
–72
–70
–66
–70
–67
–66
67
66
66
66
65
64
195
–74
20
10
80
±400
+10
3
–66
–65
–60
–65
–63
–60
—
—
—
—
—
—
—
—
—
—
—
—
—
—
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
μVrms
dB
MHz
MHz
dB
V/μs
ns
ps rms
www.murata-ps.com
Technical enquiries
email: data.acquisition@murata-ps.com, tel:
+1 508 339 3000
MDA_ADS-118.B02
Page 2 of 9
ADS-118, ADS-118A
12-Bit, 5MHz, Low-Power Sampling A/D Converters
DYNAMIC PERFORMANCE (Cont.)
S/H Acquisition Time
( to ±0.001%FSR, 10V step)
Overvoltage Recovery Time
➄
A/D Conversion Rate
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Delay, Falling Edge of EOC to
Output Data Valid
Delay, Falling Edge of ENABLE to
Output Data Valid
Output Coding
POWER REQUIREMENTS
Power Supply Ranges
➅
+5V Supply
–5V Supply
Power Supply Currents
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
Footnotes:
➀
All power supplies should be on before applying a start convert pulse. All supplies
and the clock (start convert pulses) must be present during warmup periods. The
device must be continuously converting during this time.
➁
Input voltage ranges for ADS-118A is ±1.25V
➂
A 100ns wide start convert pulse is used for all production testing. For applications
requiring less than an 5MHz sampling rate, wider start convert pulses can be used.
NOTE: The device only requires the rising edge of a start convert pulse to operate.
MIN.
—
—
5
+25°C
TYP.
85
200
—
MAX.
90
—
—
MIN.
—
—
5
0 to +70°C
TYP.
85
200
—
MAX.
90
—
—
MIN.
—
—
5
–55 to +125°C
TYP.
85
200
—
MAX.
90
—
—
UNITS
ns
ns
MHz
+2.4
—
—
—
—
—
—
—
—
—
—
—
—
+0.4
–4
+4
20
10
+2.4
—
—
—
—
—
—
—
—
—
—
—
Offset Binary
—
+0.4
–4
+4
20
10
+2.4
—
—
—
—
—
—
—
—
—
—
—
—
+0.4
–4
+4
20
10
Volts
Volts
mA
mA
MHz
MHz
+4.75
–4.75
—
—
—
—
+5.0
–5.0
+205
–180
1.8
—
+5.25
–5.25
+220
–205
2.1
±0.1
+4.75
–4.75
—
—
—
—
+5.0
–5.0
+205
–180
1.8
—
+5.25
–5.25
+220
–205
2.1
±0.1
+4.9
–4.9
—
—
—
—
+5.0
–5.0
+205
–180
1.8
—
+5.25
–5.25
+220
–205
2.1
±0.1
Volts
Volts
mA
mA
Watts
%FSR/%V
➃
Effective bits is equal to:
(SNR + Distortion) – 1.76 + 20 log
6.02
➄
This is the time required before the A/D output data is valid once the analog input is
back within the specified range.
➅
The minimum supply voltages of +4.9V and –4.9V for ±V
DD
are required for
–55°C operation only. The minimum limits are +4.75V and –4.75V when operating
at +125°C
Full Scale Amplitude
Actual Input Amplitude
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-118 requires careful
attention to pc-card layout and power supply decoupling. The device’s
analog and digital ground systems are connected to each other internally.
For optimal performance, tie all ground pins (14, 18, and 23) directly to a
large analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7μF tantalum capacitors in
parallel with 0.1μF ceramic capacitors. Locate the bypass capacitors as
close to the unit as possible.
2. The ADS-118 achieves its specified accuracies without the need for
external calibration. If required, the device’s small initial offset and gain
errors can be reduced to zero using the adjustment circuitry shown in
Figures 2a and 2b. For operation without adjustment, tie pin 17 to analog
ground. When using this circuitry, or any similar offset and gain-calibration
hardware, make adjustments following warmup. To avoid interaction,
always adjust offset before gain.
3. To enable the three-state outputs, connect ENABLE (pin 17) to a logic
"0" (low). To disable, connect pin 17 to logic "1" (high). The three-state
outputs are permanently enabled in the ADS-118A.
4. Applying a start convert pulse while a conversion is in progress (EOC =
logic "1") will initiate a new and inaccurate conversion cycle.
www.murata-ps.com
Technical enquiries
email: data.acquisition@murata-ps.com, tel:
+1 508 339 3000
MDA_ADS-118.B02
Page 3 of 9
ADS-118, ADS-118A
12-Bit, 5MHz, Low-Power Sampling A/D Converters
CALIBRATION PROCEDURE
Any offset and/or gain calibration procedures should not be implemented
until devices are fully warmed up. To avoid interaction, offset must be ad-
justed before gain. The ranges of adjustment for the circuits in Figures 2a
and 2b are guaranteed to compensate for the ADS-118's initial accuracy
errors and may not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital outputs exactly on
the transition point between two adjacent digital output codes. This can be
accomplished by connecting
LED’s to the digital outputs and adjusting until certain LED's "flicker"
equally between on and off. Other approaches employ digital comparators
or microcontrollers to detect when the outputs change from one code to
the next.
For the ADS-118, offset adjusting is normally accomplished at the point
where the MSB is a 1 and all other output bits are 0’s and the LSB just
changes from a 0 to a 1. This digital output transition ideally occurs when
the applied analog input is
+½LSB (+244μV for ADS-118; +305μV for ADS-118A).
Gain adjusting is accomplished when all bits are 1’s and the LSB just
changes from a 1 to a 0. This transition ideally occurs when the ana-
log input is at +full scale minus 1½ LSB's (+0.99927V for ADS-118;
+1.249085V for ADS-118A).
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input (pin 16) so the con-
verter is continuously converting.
2. Apply +244μV (ADS-118) or +305μV (ADS-118A) to the ANALOG INPUT
(pin 19).
3. Adjust the offset potentiometer until the output bits are 1000 0000 00000
and the LSB flickers between 0 and 1.
Gain Adjust Procedure
1. Apply +0.99927V (ADS-118) or +1.249085V (ADS-118A) to the ANALOG
INPUT (pin 19).
2. Adjust the gain potentiometer until all output bits are 1's and the LSB
flickers between 1 and 0.
3. To confirm proper operation of the device, vary the input signal to obtain
the output coding listed in Table 1.
Table 1. Output Coding for Bipolar Operation
BIPOLAR SCALE
+FS –1 LSB
+3/4 FS
+1/2 FS
0
–1/2 FS
–3/4 FS
–FS +1 LSB
–FS
ADS-118 INPUT
RANGE (±1V)
+0.99951V
+0.75000V
+0.50000V
0.00000V
–0.50000V
–0.75000V
–0.99951V
–1.00000V
OUTPUT CODING
OFFSET
MSB
BINARY
LSB
ADS-118 INPUT
RANGE (±1.25V)
+1.2494V
+0.9375V
+0.6250V
0.0000V
–0.6250V
–0.9375V
–1.2494V
–1.2500V
1111 1111 1111
1110 0000 0000
1100 0000 0000
1000 0000 0000
0100 0000 0000
0010 0000 0000
0000 0000 0001
0000 0000 0000
+15V
ZERO/
OFFSET
ADJUST
20kΩ
1.2MΩ
2kΩ
SIGNAL
INPUT
GAIN
ADJUST
–15V
GAIN
ADJUST
+15V
1.98kΩ
50Ω
To Pin19
of ADS-118A
Potentiometer is at 25Ω during the device's factory trim procedure.
SIGNAL
INPUT
50Ω
+15V (or +5V)
To Pin19
of ADS-118
–15V
–15V (or –5V)
ZERO/
OFFSET
ADJUST
20kΩ
To Pin17
of ADS-118A
Figure 2a. Optional ADS-118 External
Gain and Offset Adjust Circuits
Figure 2b. Optional ADS-118A
Gain and Offset Adjust Circuits
www.murata-ps.com
Technical enquiries
email: data.acquisition@murata-ps.com, tel:
+1 508 339 3000
MDA_ADS-118.B02
Page 4 of 9
ADS-118, ADS-118A
12-Bit, 5MHz, Low-Power Sampling A/D Converters
14
À
+
4.7µF
+5V
0.1µF
13, 21
12 BIT 1 (MSB)
11 BIT 2
10 BIT 3
9 BIT 4
8 BIT 5
5V
4.7µF
+
0.1µF
20
ADS-118
ADS-118A
18, 23
7 BIT 6
6 BIT 7
5 BIT 8
4 BIT 9
3 BIT 10
ANALOG
INPUT
START
CONVERT
19
16
2
1
15
17
BIT 11
BIT 12 (LSB)
EOC
ENABLE (1-12)
or OFFSET ADJUST
À
A single +5V supply should be used for both the +5V analog and +5V digital.
If separate supplies are used, the difference between the two cannot exceed 100mV.
Figure 3. Typical Connection Diagram
N
START
CONVERT
100ns typ.
N+1
10ns typ.
INTERNAL S/H
Hold
Acquisition Time
85ns typ.
90ns max.
35ns min., 40ns typ., 50ns max.
30ns, ±5ns
EOC
Conversion Time
140ns typ., 150ns max.
20ns typ.
OUTPUT
DATA
DATA N-1 VALID
130ns min.
150ns typ.
INVALID DATA
50ns typ.
70ns max.
DATA N VALID
INVALID DATA
Note: Scale is approximately 10ns per division.
Figure 4. ADS-118/118A Timing Diagram
www.murata-ps.com
Technical enquiries
email: data.acquisition@murata-ps.com, tel:
+1 508 339 3000
MDA_ADS-118.B02
Page 5 of 9
京公网安备 11010802033920号
EEWORLD
