XC9515
Series
2 channel Synchronous Step-Down DC/DC Converter with Manual Reset
ETR0706-008
■GENERAL
DESCRIPTION
The XC9515 series consists of 2 channel synchronous step-down DC/DC converters and a voltage detector with delay circuit
built-in. The DC/DC converter block incorporates a P-channel 0.35Ω (TYP.) driver transistor and a synchronous N-channel
0.35Ω (TYP.) switching transistor. By minimizing ON resistance of the built-in transistors, the XC9515 series can deliver
highly efficient and a stable output current up to 800mA. With high switching frequencies of 1MHz, a choice of small inductor
is possible. The series has a built-in UVLO (under-voltage lock-out) function, therefore, the internal P-channel driver
transistor is forced OFF when input voltage becomes 1.8V or lower (for XC9515A, 2.7V or lower). The voltage detector block
can be set delay time freely by connecting an external capacitor. With the manual reset function, the series can output a
reset signal at any time.
■APPLICATIONS
●DVDs
●Blu-ray
Disk
●LCD
TVs, LCD modules
●Multifunctional
printers
●Photo
printers
●Set
top boxes
■FEATURES
DC/DC Block
Input Voltage Range
Output Voltage
: 2.5V∼5.5V
: V
OUT1
=1.2V∼4.0V
V
OUT2
=1.2V∼4.0V
(Accuracy ±2%)
Oscillation Frequency
: 1MHz (Accuracy ±15%)
High Efficiency
: 95% (V
IN
=5V, V
OUT
=3.3V)
Output Current
: 800mA
Control
: PWM control
Protection Circuits
: Thermal Shutdown
: Integral Latch
(Over
Current Limit)
: Short Protection Circuit
Ceramic Capacitor Compatible
Voltage Detector (VD) Block
Detect Voltage Range
: 2.0∼5.5V（Accuracy ±2%）
Delay Time
: 173 ms
(When Cd=0.1μF is connected)
Output Configuration
: N-channel open drain
Package
: QFN-20
■TYPICAL
APPLICATION CIRCUIT
L1
VOUT1
EN1
VIN
EN2
■
TYPICAL PERFORMANCE
CHARACTERISTICS
●
Efficiency vs. Output Current
V
IN
=5V, f
OSC
=1MHz, L=4.7μH (CDRH4D28C)
L=4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
VIN=5V,FOSC=1MHz
100
90
80
C
IN
=10μF (ceramic), C
L
=10μF (ceramic)
VOUT=3.3V
LX1
EN1
PVDD
1
EN2
NC
CIN1
NC
CL1
VOUT
1
MR
AVSS
Cd
Efficiency[%]
PVSS
1
NC
PVSS
2
VDOUT
NC
PVDD
2
LX2
NC
NC
MR
70
60
50
40
30
20
10
0
1
VOUT=1.5V
VOUT
2
Cd
RUP
VOUT=1.8V
10
100
Output Current : IOUT [mA]
1000
CIN2
CL2
VDOUT
L2
VOUT2
1/21
XC9515
Series
20 P
VDD1
16 EN2
17 EN1
18 LX1
■PIN
CONFIGURATION
V
out1
15
MR 14
A
VSS
13
CD 12
V
out2
11
※1
19 NC
1 NC
2 P
VSS1
3 NC
4 P
VSS2
5 NC
QFN-20
(BOTTOM VIEW)
V
DOUT
10
NC 9
LX2 8
NC 7
■
PIN ASSIGNMENT
QFN-20
PIN
NUMBER
1
2
3
4
5
6
7
8
9
10
PIN NAME
NC
P_V
SS1
NC
P_V
SS2
NC
P_V
DD2
NC
LX2
NC
V
DOUT
FUNCTION
No Connection
Power Ground 1
No Connection
Power Ground 2
No Connection
Power Supply 2
No Connection
Switching Output 2
No Connection
Voltage Detector output
PIN
NUMBER
11
12
13
14
15
16
17
18
19
20
PIN NAME
V
OUT2
Cd
A_V
SS
MR
V
OUT1
EN2
EN1
LX1
NC
P_V
DD1
FUNCTION
Output Voltage Sense 2
Delay Capacitor Connection
Analog Ground
Manual Reset
Output Voltage Sense1
CH2 ON/OFF Control
CH1 ON/OFF Control
Switching Output 1
No Connection
Power Supply 1
*1 Back metal pad voltage
：V
SS
level
（The
back metal pad should be soldered to enhance mounting strength and heat release. If the pad needs to be connected to
other circuit, care should be taken for the pad voltage level.）
2/21
P
VDD2
6
XC9515
Series
■FUNCTION
CHART
●EN1,
EN2 and MR pins are internally pulled up. *
PIN
EN1
EN2
MR
LEVEL
High , Open
Low
High , Open
Low
High , Open
Low
2)
OPERATIONAL STATUS
DC/DC_CH1 Operation
DC/DC_CH1 Stop
DC/DC_CH2 Operation
DC/DC_CH2 Stop
VD_OUT Detect RESET Signal Output
VD_OUT Force RESET Signal Output
EN1, EN2 and MR pins are internally pulled up so that the levels of High and Open are same function.
●EN1,
EN2 and MR pins are left open internally. *
PIN
EN1
EN2
MR
LEVEL
High
Low
High
Low
High
Low
2)
OPERATIONAL STATUS
DC/DC_CH1 Operation
DC/DC_CH1 Stop
DC/DC_CH2 Operation
DC/DC_CH2 Stop
VD_OUT Detect RESET Signal Output
VD_OUT Force RESET Signal Output
EN1, EN2 and MR pins are floated inside so that these pins shall not be left open outside.
* Please refer to the PRODUCTION CLASSIFICATION to see the combination of pull-up status regarding the EN1, EN2, and MR
pins.
2)
■PRODUCT
CLASSIFICATION
●Ordering
Information (Standard products)
XC9515①②③④⑤⑥
DESIGNATOR
①
DESCRIPTION
Input Voltage & UVLO
SYMBOL
A
B
A
B
②
EN & MR logic control conditions
C
D
③④
⑤
⑥
Set Voltage Combinations
Package
Device Orientation
01∼
Z
R
L
DESCRIPTION
：Input
Voltage Range 5V±10%, UVLO Voltage 2.7V (TYP.)
：Input
Voltage Range 2.5V∼5.5V, UVLO Voltage 1.8V (TYP.)
：EN1,
EN2, MR pins are not pulled up internally
：EN1,
EN2 pins have built-in pull-up resistors,
MR pin has a built-in pull-up resistor
：EN1,
EN2 Pins are not pulled up internally,
MR pin has a built-in pull-up resistor
：EN1,
EN2 pins have built-in pull-up resistors,
MR pin are not pulled up internally
：Based
on Torex Standard Product Number
：QFN-20
：Embossed
tape, Standard feed
：Embossed
tape, Reverse feed
3/21
XC9515
Series
■BLOCK
DIAGRAM
V
OUT1
Error Amp
Current
Feedback
P
VDD
Current
Limit
V
OUT1
Error Amp
P
VDD
Current
Limit
Current
Feedback
PVDD1
LX1
EN1
EN2
Soft
Start
PWM
Comparator
Ramp
Wave
Thermal
Shutdown
Logic
Buffer
Drive
LX1
EN1
Soft
Start
PWM
Comparator
Ramp
Wave
Thermal
Shutdown
Logic
Buffer
Drive
ON/
OFF
Control
P
VSS1
EN2
ON/
OFF
Control
P
VSS1
Vre½
OSC
Vre½
OSC
V
OUT2
P
VDD2
Soft
Start
Ramp
Wave
Current
Limit
V
OUT2
Soft
Start
P
VDD2
Ramp
Wave
Current
Limit
Current
Feedback
Current
Feedback
Error Amp
PVDD1
LX2
PWM
Comparator
Logic
Buffer
Drive
Error Amp
PVDD1
LX2
PWM
Comparator
Logic
Buffer
Drive
P
VSS2
MR
V
DOUT
Rdelay
Rdelay
P
VSS2
MR
V
DOUT
Vre½
Vre½
A
VSS
Cd
A
VSS
Cd
■ABSOLUTE
MAXIMUM RATINGS
Ta=25℃
PARAMETER
P_V
DD1
・P_V
DD2
Pin Voltage
V
OUT1
・V
OUT2
Pin Voltage
Cd Pin Voltage
V
DOUT
Pin Voltage
V
DOUT
Pin Current
EN1・EN2・MR Pin Voltage
LX1・LX2 Pin Voltage
LX1・LX2 Pin Current
Power Dissipation
QFN-20
SYMBOL
P_V
DD1,
P_V
DD2
V
OUT1,
V
OUT2
V
Cd
V
DOUT
I
DOUT
V
EN1,
V
EN2,
V
MR
V
Lx1,
V
Lx2
I
Lx1,
I
Lx2
Pd (Free air)
Pd (Wiring on PCB)
Topr
Tstg
RATINGS
-0.3½6.5
-0.3½6.5
-0.3½P_V
DD1
・
2
+ 0.3
-0.3½6.5
10
-0.3½6.5
-0.3½P_V
DD1
・
2
+0.3
1500
300
1000
-40
½
+85
-55
½
+125
UNITS
V
V
V
V
mA
V
V
mA
mW
o
o
Operating Temperature Range
Storage Temperature Range
* P_V
DD1
・
2
stands for P_V
DD1
=P_V
DD2
A_V
SS
=P_V
SS1
=P_V
SS2
=0V
C
C
4/21
XC9515
Series
■ELECTRICAL
CHARACTERISTICS
XC9515AB04xx
●
DC/DC CH1, CH2 (V
OUT1
=1.5V, V
OUT2
=3.3V, f
OSC
=1MHz, EN1・2 Pull-up inside)
PARAMETER
Input Voltage
Output Voltage 1
Output Voltage 2
Maximum Output Current 1・2
Current Limit 1・2
Oscillation Frequency
Maximum Duty Cycle
Minimum Duty Cycle
Efficiency 1
(*2)
(*1)
Ta =25
o
C
MIN.
4.5
TYP.
5.0
MAX. UNITS CIRCUIT
5.5
V
V
V
mA
mA
MHz
%
%
%
－
①
①
①
②
①
②
②
①
SYMBOL
V
IN
V
OUT1
V
OUT2
I
OUTMAX1
I
OUTMAX2
I
LIM1
・
I
LIM 2
f
OSC
MINDTY
EFFI1
CONDITIONS
Connected to the external components,
P_V
DD1
・
2
=V
EN1
=V
EN2
=0V, I
OUT1
=30mA
Connected to the external components,
P_V
DD1
・
2
=V
EN2
=V
EN1
=0V, I
OUT2
=30mA
1.470 1.500 1.530
3.234 3.300 3.366
800
1000
－
－
1.00
－
－
89
－
－
1.15
－
0
－
Connected to the external components, I
OUT
=10mA
V
OUT1
=V
OUT2
=V
IN
Connected to the external components,
P_V
DD1
・
2
=V
EN1
=5.0V, V
EN2
=0V,
V
OUT1
=1.5V, I
OUT
1=200mA
Connected to the external components,
0.85
100
－
－
MAXDTY V
OUT1
=V
OUT2
=0V
Efficiency 2
(*2)
EFFI2
P_V
DD1
・
2
=V
EN2
=5.0V, V
EN1
=0V,
V
OUT2
=3.3V, I
OUT2
=200mA
－
94
－
%
①
LX1・2 "H" ON Resistance
LX1・2 "L" ON Resistance
Integral Latch Time 1・2
R
LX1H・
R
LX2H
V
OUT1
=V
OUT2
=0V, I
Lx1
=I
Lx2
=100mA
R
LX1L・
R
LX2L
(*3)
－
－
0.35
0.35
6
(*4)
－
－
－
Ω
Ω
ms
③
－
⑦
(*4)
LX1 and LX2 are pulled down by a resistor of 200Ω
t
LAT1
・
t
LAT2
V
OUT1
=Setting Voltage×0.9,
V
OUT2
= Setting Voltage
×0.9
Soft-Start Time 1・2
EN1・2 "H" Level Voltage
EN1・2 "L" Level Voltage
EN1・2 "H" Level Current
EN1・2 "L" Level Current
LX1・2 "H" Leakage Current
(*7)
(*5)
－
t
SS1
・
t
SS2
V
EN1H・
V
EN2H
V
EN1L・
V
EN2L
Time until EN1, EN2 or both pins changes from 0V to
V
IN
and voltage becomes V
OUT1
・
2
×0.95,
I
OUT1
・
2
=10mA
V
OUT1
=V
OUT2
=0V
Voltage which LX1 or LX2 becomes ”H”
V
OUT1
=V
OUT2
=0V
Voltage which LX1 or LX2 becomes ”L”
(*6)
(*6)
－
1.2
AVSS
－
－
－
-3.0
(*9)
1.3
－
－
－
5
0.4
0.1
(*8)
ms
V
V
μA
μA
μA
μA
①
④
④
④
④
④
④
I
EN1H・
I
EN2H
P_V
DD1
・
2
=V
EN1
=V
EN2
=5.5V
I
EN1L・
I
EN2L
P_V
DD1
・
2
=5.5V, V
EN1
=V
EN2
=0V
I
LEAK1H・
I
LEAK2H
I
LEAK1L・
I
LEAK2L
P_V
DD1
・
2
=V
LX1
=V
LX2
=5.5V, V
EN1
=V
EN2
=0V
P_V
DD1
・
2
=5.5V, V
LX1
=V
LX2
=V
EN1
=V
EN2
=0V
-6
(*8)
－
1.0
(*9)
－
－
LX1・2 "L" Leakage Current
－
Test Conditions：
* P_V
DD1
・
2
stands for P_V
DD1
=P_V
DD2
**Unless otherwise stated, P_V
DD1
・
2
=5V, V
EN1
=V
EN2
= P_V
DD1
・
2
*** A_V
SS
=P_V
SS1
=P_V
SS2
=0V
NOTE :
*1
：
When the difference between the input and the output is small, some cycles may be skipped completely before current maximizes.
If current is further pulled from this state, output voltage will decrease because of P-ch driver ON resistance.
*2
：
EFFI = { ( output voltage x output current ) / ( input voltage x input current) } x 100
*3
：
On resistance (Ω)= (V
IN
- Lx pin measurement voltage) / 100mA
*4
：
Designed value.
*5
：
Time until it short-circuits LX1 (LX2 in the side of 2CH) with GND via 1Ωof resistor from an operational state and is set to Lx=0V from
current limit pulse generating.
*6
：
”H” is judged as “H”>V
IN
-0.1V, ”L” is judged as ”L”<0.1V.
*7
：
When temperature is high, a current of approximately 20μA (maximum) may leak.
*8
：
Current which EN1 and EN2 are measured separately.
*9
：
Lead current which LX1 and LX2 are measured separately.
5/21
京公网安备 11010802033920号
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