Latch up Current.................................................... > 200 mA
Operating Range
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
V
CC
5V ± 10%
5V ± 10%
Electrical Characteristics
Over the Operating Range
7C136-15
[4]
7C132-30
[4]
7C136-25, 30
7C142-30
7C146-25, 30
7C132-35,45
7C136-35,45
7C142-35,45
7C146-35,45
7C132-55
7C136-55
7C136A-55
7C142-55
7C146-55
Parameter
Description
Test Conditions
7C146-15
Unit
Min
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
I
SB1
Output HIGH
voltage
Output LOW
voltage
Input HIGH
voltage
Input LOW
voltage
Input load current GND < V
I
< V
CC
Output leakage
current
Output short
circuit current
[6]
V
CC
Operating
Supply Current
GND < V
O
< V
CC
, Output Disabled
V
CC
= Max., V
OUT
= GND
CE = V
IL
, Outputs Open,
f = f
MAX[7]
Com’l/
Ind’l
Com’l/
Ind’l
Com’l/
Ind’l
–5
–5
V
CC
= Min., I
OH
= –4.0 mA
I
OL
= 4.0 mA
I
OL
= 16.0 mA
[5]
2.2
2.4
Max
Min
2.4
Max
Min
2.4
Max
Min
2.4
Max
V
0.4
0.5
V
V
0.8
V
μA
μA
mA
mA
mA
0.4
0.5
2.2
0.8
+5
+5
–350
190
75
−5
−5
0.4
0.5
2.2
0.8
+5
+5
−350
170
65
−5
−5
0.4
0.5
2.2
0.8
+5
+5
−350
120
45
−5
−5
+5
+5
−350
110
35
Standby current CE
L
and CE
R
> V
IH
,
[7]
both ports, TTL f = f
MAX
Inputs
Standby Current CE
L
or CE
R
> V
IH
,
One Port,
Active Port Outputs Open,
TTL Inputs
f = f
MAX[7]
I
SB2
135
115
90
75
mA
I
SB3
Com’l/
Standby Current Both Ports CE
L
and
Both Ports,
CE
R
> V
CC
– 0.2V, V
IN
> V
CC
– 0.2V Ind’l
CMOS Inputs
or V
IN
< 0.2V, f = 0
Standby Current One Port CE
L
or CE
R
> V
CC
– 0.2V, Com’l/
One Port,
Ind’l
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V,
CMOS Inputs
[7]
Active Port Outputs Open, f = f
MAX
15
15
15
15
mA
I
SB4
125
105
85
70
mA
Shaded areas contain preliminary information.
Notes
5. BUSY and INT pins only.
6. Duration of the short circuit should not exceed 30 seconds.
7. At f = f
MAX
, address and data inputs are cycling at the maximum frequency of read cycle of 1/t
rc
and using AC Test Waveforms input levels of GND to 3V.
Document #: 38-06031 Rev. *E
Page 3 of 15
[+] Feedback
CY7C132, CY7C136
CY7C136A, CY7C142, CY7C146
Capacitance
This parameter is guaranteed but not tested.
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Figure 3. AC Test Loads and Waveforms
5V
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
Equivalent to:
R2
347Ω
R1 893Ω
5V
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
R2
347Ω
BUSY
OR
INT
R1 893Ω
5V
281Ω
Test Conditions
T
A
= 25°C, f = 1 MHz, V
CC
= 5.0V
Max
15
10
Unit
pF
pF
30 pF
(a)
THÉVENIN EQUIVALENT
(b)
3.0V
BUSY Output Load
(CY7C132/CY7C136 Only)
ALL INPUT PULSES
10%
90%
90%
10%
< 5 ns
250Ω
OUTPUT
1.4V
GND
< 5 ns
Switching Characteristics
Over the Operating Range (Speeds -15, -25, -30)
[8]
7C136-15
7C146-15
Min
Read Cycle
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
Read Cycle Time
Address to Data Valid
[9]
Data Hold from Address Change
CE LOW to Data Valid
[9]
OE LOW to Data Valid
[9]
OE LOW to Low Z
[7, 10]
OE HIGH to High Z
[7, 10, 11]
CE LOW to Low Z
[7, 10]
CE HIGH to High Z
[7, 10, 11]
CE LOW to Power Up
[7]
CE HIGH to Power Down
[7]
0
15
3
10
0
25
3
10
5
15
0
25
0
15
10
3
15
5
15
15
15
0
25
15
3
15
25
25
0
30
20
30
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
[4]
Parameter
Description
7C132-25
[4]
7C136-25
7C142-25
7C146-25
Min
Max
7C132-30
7C136-30
7C142-30
7C146-30
Min
Max
Unit
Max
Shaded areas contain preliminary information.
Notes
8. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading of the specified I
OL
/I
OH,
and 30 pF load capacitance.
9. AC test conditions use V
OH
= 1.6V and V
OL
= 1.4V.
10. At any given temperature and voltage condition for any given device, t
HZCE
is less than t
LZCE
and t
HZOE
is less than t
LZOE
.
11. t
LZCE
, t
LZWE
, t
HZOE
, t
LZOE,
t
HZCE,
and t
HZWE
are tested with C
L
= 5pF as in (b) of
AC Test Loads and Waveforms.
Transition is measured ± 500 mV from steady state
voltage.
Document #: 38-06031 Rev. *E
Page 4 of 15
[+] Feedback
CY7C132, CY7C136
CY7C136A, CY7C142, CY7C146
Switching Characteristics
Over the Operating Range (Speeds -15, -25, -30)
[8]
(continued)
7C136-15
7C146-15
Min
Write
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
HZWE
t
LZWE
t
BLA
t
BHA
t
BLC
t
BHC
t
PS
t
WB
t
WH
t
BDD
t
DDD
t
WDD
t
WINS
t
EINS
t
INS
t
OINR
t
EINR
t
INR
Cycle
[12]
Write Cycle Time
CE LOW to Write End
Address Setup to Write End
Address Hold from Write End
Address Setup to Write Start
R/W Pulse Width
Data Setup to Write End
Data Hold from Write End
R/W LOW to High Z
[7]
R/W HIGH to Low Z
[7]
BUSY LOW from Address Match
BUSY HIGH from Address Mismatch
[13]
BUSY LOW from CE LOW
BUSY HIGH from CE HIGH
[13]
Port Set Up for Priority
R/W LOW after BUSY LOW
[14]
R/W HIGH after BUSY HIGH
BUSY HIGH to Valid Data
Write Data Valid to Read Data Valid
Write Pulse to Data Delay
R/W to INTERRUPT Set Time
CE to INTERRUPT Set Time
Address to INTERRUPT Set Time
OE to INTERRUPT Reset
Time
[13]
[13]
[4]
Parameter
Description
7C132-25
[4]
7C136-25
7C142-25
7C146-25
Min
25
20
20
2
0
15
15
0
Max
7C132-30
7C136-30
7C142-30
7C146-30
Min
30
25
25
2
0
25
15
0
Max
Unit
Max
15
12
12
2
0
12
10
0
10
0
15
15
15
15
5
0
13
15
Note 15
Note 15
15
15
15
15
15
15
ns
ns
ns
ns
ns
ns
ns
ns
15
ns
ns
20
20
20
20
ns
ns
ns
ns
ns
ns
ns
30
Note 15
Note 15
25
25
25
25
25
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
0
20
20
20
20
5
0
20
25
Note 15
Note 15
25
25
25
25
25
25
5
0
30
0
Busy/Interrupt Timing
Interrupt Timing
[16]
CE to INTERRUPT Reset Time
Address to INTERRUPT Reset
Time
[13]
Shaded areas contain preliminary information.
Notes
12. The internal write time of the memory is defined by the overlap of CE LOW and R/W LOW. Both signals must be LOW to initiate a write and either signal can terminate
a write by going HIGH. The data input setup and hold timing must be referenced to the rising edge of the signal that terminates the write.
13. These parameters are measured from the input signal changing, until the output pin goes to a high impedance state.
14. CY7C142/CY7C146 only.
15. A write operation on Port A, where Port A has priority, leaves the data on Port B’s outputs undisturbed until one access time after one of the following: