71256L55PK datasheet, PDF - EEWORLD Datasheet

71256L55PK: DescriptionStandard SRAM, 32KX8, 55ns, CMOS, PDSO28; Categorystorage storage; File Size511KB，10 Pages; ManufacturerIDT (Integrated Device Technology)

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71256L55PK Overview

Standard SRAM, 32KX8, 55ns, CMOS, PDSO28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	109021392
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	55 ns
I/O type	COMMON
JESD-30 code	R-PDSO-J28
JESD-609 code	e0
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of terminals	28
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Encapsulate equivalent code	SOJ28,.4
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.00012 A
Minimum standby current	2 V
Maximum slew rate	0.105 mA
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

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