IS62WV2568ALL
IS62WV2568BLL
256K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 45ns, 55ns, 70ns
• CMOS low power operation
– 36 mW (typical) operating
– 9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
– 1.65V--2.2V V
cc
(62WV2568ALL)
– 2.5V--3.6V V
cc
(62WV2568BLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
• Lead-free available
JANUARY 2010
DESCRIPTION
The
ISSI
IS62WV2568ALL / IS62WV2568BLL are high-
speed, 2M bit static RAMs organized as 256K words
by 8 bits. It is fabricated using
ISSI
's high-performance
CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected) , the device assumes a standby mode at
which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory.
The IS62WV2568ALL and IS62WV2568BLL are packaged
in the JEDEC standard 32-pin TSOP (TYPE I), sTSOP
(TYPE I), and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 8
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CS2
CS1
OE
WE
CONTROL
CIRCUIT
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. H
1/6/10
1
IS62WV2568ALL, IS62WV2568BLL
PIN DESCRIPTIONS
A0-A17 Address Inputs
CS1
Chip Enable 1 Input
CS2
OE
WE
NC
Vcc
GND
Chip Enable 2 Input
Output Enable Input
Write Enable Input
No Connection
Power
Ground
I/O0-I/O7 Input/Output
PIN CONFIGURATION
36-pin mini BGA (B) (6mm x 8mm)
32-pin TSOP (TYPE I), sTSOP (TYPE I)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
A0
I/O4
I/O5
GND
Vcc
I/O6
I/O7
A9
A1
A2
CS2
WE
NC
A3
A4
A5
A6
A7
A8
I/O0
I/O1
Vcc
GND
NC
OE
A10
CS1
A11
A17
A16
A12
A15
A13
I/O2
I/O3
A14
A11
A9
A8
A13
WE
CS2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
2
Integrated Silicon Solution, Inc. — www.issi.com
Rev. H
1/6/10
IS62WV2568ALL, IS62WV2568BLL
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
term
t
stg
P
t
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
Value
–0.2 to Vcc+0.3
–65 to +150
1.0
Unit
V
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli-
ability.
OPERATING RANGE (Vcc)
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
IS62WV2568ALL
1.65V - 2.2V
1.65V - 2.2V
IS62WV2568BLL
2.5V - 3.6V
2.5V - 3.6V
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
oh
V
oL
V
Ih
V
IL
(1)
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
Test Conditions
I
oh
=
-0.1 mA
I
oh
=
-1 mA
I
oL
=
0.1 mA
I
oL
=
2.1 mA
Vcc
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
Min.
1.4
2.2
—
—
1.4
2.2
–0.2
–0.2
–1
–1
Max.
—
—
0.2
0.4
V
cc
+ 0.2
V
cc
+ 0.3
0.4
0.6
1
1
Unit
V
V
V
V
V
V
V
V
µA
µA
GND ≤
V
In
≤
V
cc
GND ≤
V
out
≤
V
cc
,
Outputs Disabled
Notes:
1. Undershoot: -1.0V for pulse width less than 10ns. Not 100% tested.
2. Overshoot: V
dd
+ 1.0V for pulse width less than 10ns. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. H
1/6/10
3
IS62WV2568ALL, IS62WV2568BLL
CAPACITANCE
(1)
Symbol
c
In
c
out
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
In
= 0V
V
out
= 0V
Max.
8
10
Unit
pF
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
62WV2568ALL
(Unit)
0.4V to Vcc-0.2V
5 ns
V
ref
See Figures 1 and 2
62WV2568BLL
(Unit)
0.4V to Vcc-0.3V
5ns
V
ref
See Figures 1 and 2
r1(Ω)
R2(Ω)
V
ref
V
tm
1.65-2.2V
3070
3150
0.9V
1.8V
2.5V - 3.6V
3070
3150
1.5V
2.8V
AC TEST LOADS
R1
VTM
OUTPUT
30 pF
Including
jig and
scope
R2
R1
VTM
OUTPUT
5 pF
Including
jig and
scope
R2
Figure 1
4
Figure 2
Integrated Silicon Solution, Inc. — www.issi.com
Rev. H
1/6/10
IS62WV2568ALL, IS62WV2568BLL
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
62WV2568ALL
(1.65V - 2.2V)
Symbol Parameter
I
cc
I
cc
1
I
sB
1
Vcc Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
cc
=
Max.,
Com.
I
out
= 0
mA, f = f
mAx
Ind.
V
cc
=
Max.,
Com.
I
out
= 0
mA, f = 0
Ind.
V
cc
=
Max.,
Com.
V
In
= V
Ih
or
V
IL
Ind.
CS1
= V
Ih
, CS2 =
V
IL
,
f = 1 MH
z
Max.
70ns
15
15
3
3
0.3
0.3
Unit
mA
mA
mA
I
sB
2
CMOS Standby
V
cc
=
Max.,
Com.
Current (CMOS Inputs)
CS1
≥
V
cc
– 0.2V,
Ind.
CS2
≤ 0.2V,
V
In
≥
V
cc
– 0.2V,
or
V
In
≤
0.2V,
f = 0
5
10
µA
Note:
1. At f = f
mAx
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
62WV2568BLL
(2.5V - 3.6V)
Symbol Parameter
I
cc
Test Conditions
Vcc Dynamic Operating
V
cc
=
Max.,
Com.
Supply Current
I
out
= 0
mA, f = f
mAx
Ind.
TTL Standby Current
(TTL Inputs)
V
cc
=
Max.,
Com.
V
In
= V
Ih
or
V
IL
Ind.
CS1
= V
Ih
, CS2 =
V
IL
,
f = 1 MH
z
Max.
45ns
35
40
0.3
0.3
Max.
55ns
30
35
0.3
0.3
Max.
70ns
25
30
0.3
0.3
Unit
mA
mA
I
sB
1
I
sB
2
CMOS Standby
V
cc
=
Max.,
Com.
Current (CMOS Inputs)
CS1
≥
V
cc
– 0.2V,
Ind.
CS2
≤ 0.2V,
V
In
≥
V
cc
– 0.2V,
or
V
In
≤
0.2V,
f = 0
10
10
10
10
10
10
µA
Note:
1. At f = f
mAx
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. H
1/6/10
5
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