IS62WV12816ALL
IS62WV12816BLL
128K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 45ns, 55ns, 70ns
• CMOS low power operation
– 36 mW (typical) operating
– 9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
– 1.65V--2.2V V
DD
(62WV12816ALL)
– 2.5V--3.6V V
DD
(62WV12816BLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• 2CS Option Available
• Lead-free available
ISSI
JUNE 2005
®
DESCRIPTION
The
ISSI
IS62WV12816ALL/ IS62WV12816BLL are high-
speed, 2M bit static RAMs organized as 128K words by 16
bits. It is fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected) or when
CS1
is LOW, CS2 is HIGH and both
LB
and
UB
are HIGH, the device assumes a standby mode
at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory. A
data byte allows Upper Byte
(UB)
and Lower Byte (LB)
access.
The IS62WV12816ALL and IS62WV12816BLL are packaged
in the JEDEC standard 48-pin mini BGA (6mm x 8mm) and
44-Pin TSOP (TYPE II).
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CS2
CS1
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. E
06/08/05
1
IS62WV12816ALL,
PIN CONFIGURATIONS
IS62WV12816BLL
ISSI
48-Pin mini BGA (6mm x 8mm)
2 CS Option (Package Code B2)
1
2
3
4
5
6
®
48-Pin mini BGA (6mm x 8mm)
(Package Code B)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
V
DD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
NC
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CSI
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
N/C
I/O
0
I/O
2
V
DD
GND
I/O
6
I/O
7
NC
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
VDD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
NC
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CS1
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
CS2
I/O
0
I/O
2
VDD
GND
I/O
6
I/O
7
NC
44-Pin mini TSOP (Type II)
(Package Code T)
PIN DESCRIPTIONS
A0-A16
I/O0-I/O15
CS1,
CS2
OE
WE
LB
UB
NC
V
DD
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. E
06/08/05
IS62WV12816ALL,
TRUTH TABLE
Mode
Not Selected
WE
X
X
X
H
H
H
H
H
L
L
L
IS62WV12816BLL
ISSI
UB
X
X
H
X
L
H
L
L
H
L
L
I/O PIN
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
High-Z
D
OUT
D
IN
High-Z
D
IN
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
D
OUT
High-Z
D
IN
D
IN
V
DD
Current
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
CC
I
CC
I
CC
®
CS1
H
X
X
L
L
L
L
L
L
L
L
CS2
X
L
X
H
H
H
H
H
H
H
H
OE
X
X
X
H
H
L
L
L
X
X
X
LB
X
X
H
L
X
L
H
L
L
H
L
Output Disabled
Read
Write
I
CC
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
Value
–0.2 to V
DD
+0.3
–65 to +150
1.0
Unit
V
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
OPERATING RANGE (V
DD
)
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
IS62WV12816ALL
1.65V - 2.2V
1.65V - 2.2V
IS62WV12816BLL
2.5V - 3.6V
2.5V - 3.6V
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. E
06/08/05
3
IS62WV12816ALL,
IS62WV12816BLL
ISSI
Max.
70
15
20
3
3
0.3
0.3
Unit
mA
mA
mA
®
IS62WV12816ALL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
I
CC
I
CC
1
I
SB
1
Parameter
V
DD
Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
DD
= Max.,
Com.
I
OUT
= 0 mA, f = f
MAX
Ind.
V
DD
= Max.,
Com.
I
OUT
= 0 mA, f = 0
Ind.
V
DD
= Max.,
Com.
V
IN
= V
IH
or V
IL
Ind.
CS1
= V
IH
, CS2 = V
IL
,
f = 1 MH
Z
OR
V
DD
= Max., V
IN
= V
IH
or V
IL
CS1
= V
IL
, f = 0,
UB
= V
IH
,
LB
= V
IH
V
DD
= Max.,
Com.
CS1
≥
V
DD
– 0.2V,
Ind.
CS2
≤
0.2V,
V
IN
≥
V
DD
– 0.2V, or
V
IN
≤
0.2V, f = 0
OR
V
DD
= Max.,
CS1
= V
IL
, CS2=V
IH
V
IN
≤
0.2V, f = 0;
UB
/
LB
= V
DD
– 0.2V
ULB Control
I
SB
2
CMOS Standby
Current (CMOS Inputs)
5
10
µA
ULB Control
IS62WV12816BLL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
I
CC
Parameter
V
DD
Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
DD
= Max.,
I
OUT
= 0 mA, f = f
MAX
V
DD
= Max.,
I
OUT
= 0 mA, f = 0
V
DD
= Max.,
V
IN
= V
IH
or V
IL
CS1
= V
IH
, CS2 = V
IL
,
f = 1 MH
Z
Com.
Ind.
typ.
(2)
Com.
Ind.
Com.
Ind.
OR
Max.
45
35
40
25
3
3
0.3
0.3
Max.
55
25
30
20
3
3
0.3
0.3
Unit
mA
I
CC
1
I
SB
1
mA
mA
ULB Control
I
SB
2
CMOS Standby
Current (CMOS Inputs)
V
DD
= Max., V
IN
= V
IH
or V
IL
CS1
= V
IL
, f = 0,
UB
= V
IH
,
LB
= V
IH
V
DD
= Max.,
Com.
CS1
≥
V
DD
– 0.2V,
Ind.
CS2
≤
0.2V,
typ.
(2)
V
IN
≥
V
DD
– 0.2V, or
V
IN
≤
0.2V, f = 0
OR
V
DD
= Max.,
CS1
= V
IL
, CS2=V
IH
V
IN
≤
0.2V, f = 0;
UB
/
LB
= V
DD
– 0.2V
10
10
3
10
10
3
µA
ULB Control
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at V
DD
= 3.0V, T
A
= 25
o
C and not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. E
06/08/05
5
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