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BDGLA16NB

Description
Line Driver, 1 Func, 4 Driver, BICMOS, PDSO16, PLASTIC, SO-16
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size255KB,16 Pages
ManufacturerLSC/CSI
Websitehttps://lsicsi.com
Download Datasheet Parametric View All

BDGLA16NB Overview

Line Driver, 1 Func, 4 Driver, BICMOS, PDSO16, PLASTIC, SO-16

BDGLA16NB Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerLSC/CSI
Parts packaging codeSOIC
package instructionPLASTIC, SOIC-16
Contacts16
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
Differential outputYES
Number of drives4
High level input current maximum value0.00002 A
Input propertiesSTANDARD
Interface integrated circuit typeLINE DRIVER
Interface standardsESDI
JESD-30 codeR-PDSO-G16
JESD-609 codee0
Number of functions4
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Minimum output swing0.8 V
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum receive delay
Maximum seat height1.73 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyBICMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
maximum transmission delay2 ns
Base Number Matches1
Data Sheet
January 1999
Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Features
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Pin-equivalent to the general-trade 26LS31 device,
with improved speed, reduced power consumption,
and significantly lower levels of EMI
Four line drivers per package
Meets ESDI standards
2.0 ns maximum propagation delay
Single 5.0 V
±
10% supply
Operating temperature range:
−40
°C to +125 °C
(wider than the 41 Series)
400 Mbits/s maximum data rate
Logic to convert TTL input logic levels to differen-
tial, pseudo-ECL output logic levels
No line loading when V
CC
= 0 (BDG1A, BDP1A
only)
High output driver for 50
loads
<0.2 ns output skew (typical)
On-chip 220
loads available
Third-state outputs available
Surge-protection to ±60 V for 10 ms available
(BPNGA, BPNPA, BPPGA)
Available in four package types
ESD performance better than the 41 Series
Lower power requirement than the 41 Series
26LS31, but offer increased speed, decreased power
consumption, and significantly lower levels of electro-
magnetic interference (EMI). They replace the Agere
41 Series drivers.
The BDG1A device is the generic driver in this family
and requires the user to supply external resistors on
the circuit board for impedance matching.
The BDGLA is a low-power version of the BDG1A,
reducing the power requirement by more than one
half. The BDGLA features a 3-state output with a typ-
ical third-state level of 0.2 V.
The BDP1A is equivalent to the BDG1A but has
220
termination resistors to ground on each driver
output. This eliminates the need for external pull-
down resistors when driving a 100
impedance line.
The BPNGA and BPNPA are equivalent to the
BDG1A and BDP1A, respectively, except that a light-
ning protection circuit has been added to the driver
outputs. This circuit will absorb large transitions on
the transmission lines without destroying the device.
The BPPGA combines the features of the BPNGA
and BPNPA. Two of the gates have their outputs ter-
minated to ground through 220
resistors while the
two remaining gates require external termination
resistors.
When the BDG1A and the BDP1A devices are pow-
ered down, the output circuit appears as an open cir-
cuit relative to the power supplies; hence, they will
not load the transmission line. For those circuits with
termination resistors, the line will remain impedance
matched when the circuit is powered down. The
BPNGA, BPNPA, BPPGA, and BDGLA will load the
transmission line, because of the protection circuit,
when the circuit is powered down.
The packaging options that are available for these
quad differential line drivers include a 16-pin DIP; a
16-pin, J-lead SOJ; a 16-pin, gull-wing SOIC; and a
16-pin, narrow-body, gull-wing SOIC.
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Description
These quad differential drivers are TTL input-to-
pseudo-ECL-differential-output used for digital data
transmission over balanced transmission lines. All
devices in this family have four drivers with a single
enable control in a common package. These drivers
are compatible with many receivers, including the
Agere Systems Inc. 41 Series receivers and trans-
ceivers. They are pin equivalent to the general-trade

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