PIC16(L)F19155/56/75/76/85/86
Full-Featured 28/40/44/48-Pin Microcontrollers
Description
PIC16(L)F19155/56/75/76/85/86 microcontrollers offer eXtreme Low-Power (XLP) LCD drive coupled with Core
Independent Peripherals (CIPs) and Intelligent Analog. They are especially suited for battery-powered LCD applications
due to an integrated charge pump, high current I/O drive for backlighting, and battery backup of the Real-Time Clock/
Calendar (RTCC). Active clock tuning of the HFINTOSC provides a highly accurate clock source over voltage and
temperature. The family also features a new 12-bit ADC controller which can automate Capacitive Voltage Divider
(CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and automatic threshold comparison.
Other new features include low-power Idle and Doze modes, Device Information Area (DIA), and Memory Access
Partition (MAP). These low-power products are available in 28/40/44 and 48 pins to support the customer in various
LCD and general purpose applications.
Core Features
• C Compiler Optimized RISC Architecture
• Operating Speed:
- DC – 32 MHz clock input
- 125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Timers:
- Two 8-bit (TMR2/4) Timer with Hardware
Limit Timer Extension (HLT)
- 16-bit (TMR0/1)
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRTE)
• Brown-out Reset (BOR) with Fast Recovery
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT):
- Variable prescaler selection
- Variable window size selection
- All sources configurable in hardware or
software
• Programmable Code Protection
Operating Characteristics
• Operating Voltage Range:
- 1.8V to 3.6V (PIC16LF19155/56/75/76/85/
86)
- 2.3V to 5.5V (PIC16F19155/56/75/76/85/86)
• Temperature Range:
- Industrial: -40°C to 85°C
- Extended: -40°C to 125°C
Power-Saving Functionality
• Doze mode: Ability to run CPU core slower than
the system clock
• Idle mode: Ability to halt CPU core while internal
peripherals continue operating
• Sleep mode: Lowest power consumption
• Peripheral Module Disable (PMD): Ability to
disable hardware module to minimize power
consumption of unused peripherals
eXtreme Low-Power (XLP) Features
•
•
•
•
Sleep mode: 50 nA @ 1.8V, typical
Watchdog Timer: 500 nA @ 1.8V, typical
Secondary Oscillator: 500 nA @ 32 kHz
Operating Current:
- 8 µA @ 32 kHz, 1.8V, typical
- 32 µA/MHz @ 1.8V, typical
Memory
•
•
•
•
•
Up to 16kW/28KB Flash Program Memory
Up to 2KB Data SRAM Memory
256 bytes DataEE
Direct, Indirect and Relative Addressing modes
Memory Access Partition (MAP):
- Bootloader write-protect
- Custom partition
• Device Information Area (DIA):
- Temp sensor factory calibrated data
- Fixed Voltage Reference
- Device ID
Digital Peripherals
• LCD Controller:
- Up to 248 segments
- Charge pump for low-voltage operation
- Contrast control
• Four Configurable Logic Cell Modules (CLC):
- Integrated combinational and sequential logic
2017-2019 Microchip Technology Inc.
DS40001923B-page 1
PIC16(L)F19155/56/75/76/85/86
• Complementary Waveform Generator (CWG):
- Rising and falling edge dead-band control
- Full-bridge, half-bridge, 1-channel drive
- Multiple signal sources
• Two Capture/Compare/PWM (CCP) module
• Two 10-Bit PWMs
• Peripheral Pin Select (PPS):
- Enables pin mapping of digital I/O
• Communication:
- Two EUSART, RS-232, RS-485, LIN
compatible
- One SPI/I
2
C, SMBus, PMBus™ compatible
• Up to 43 I/O Pins:
- Individually programmable pull-ups
- Slew rate control
- Interrupt-on-change with edge-select
- Input level selection control (ST or TTL)
- Digital open-drain enable
Flexible Oscillator Structure
• High-Precision Internal Oscillator:
- Active Clock Tuning of HFINTOSC over
voltage and temperature (ACT)
- Selectable frequency range up to 32 MHz
±1% typical
• x2/x4 PLL with Internal and External Sources
• Low-Power Internal 31 kHz Oscillator
(LFINTOSC)
• External 32 kHz Crystal Oscillator (SOSC)
- Oscillator Start-up Timer (OST)
- Ensures stability of crystal oscillator source
• External Oscillator Block with:
- Three external clock modes up to 32 MHz
• Fail-Safe Clock Monitor:
- Allows for safe shutdown if peripherals clock
stops
Analog Peripherals
• Analog-to-Digital Converter with Computation
(ADC
2
):
- 12-bit with up to 39 external channels
- Automates math functions on input signals:
averaging, filter calculations, oversampling
and threshold comparison
- Conversion available during Sleep
• Two Comparators:
- (1) Low-Power Clocked Comparator
- (1) High-Speed Comparator
- Fixed Voltage Reference at (non)inverting
input(s)
- Comparator outputs externally accessible
• 5-Bit Digital-to-Analog Converter (DAC):
- 5-bit resolution, rail-to-rail
- Positive Reference Selection
- Unbuffered I/O pin output
- Internal connections to ADCs and
comparators
• Voltage Reference:
- Fixed Voltage Reference with 1.024V, 2.048V
and 4.096V output levels
• Zero-Cross Detect Module:
- AC high-voltage zero-crossing detection for
simplifying TRIAC control
- Synchronized switching control and timing
2017-2019 Microchip Technology Inc.
DS40001923B-page 2
2017-2019 Microchip Technology Inc.
DS40001923B-page 3
TABLE 1:
PIC16(L)F191XX FAMILY TYPES
Temperature Indicator
8-bit/ (with HLT) Timer
LCD Segments (Max)
96
96
184
184
248
248
360
360
360
LCD Charge Pump/
Bias Generator
Y/Y
Y/Y
Y/Y
Y/Y
Device Information
Area
Window Watchdog
Timer (WWDT)
Zero-Cross Detect
Peripheral Module
Disable
Y
Y
Y
Y
Y
Y
Y
Y
Y
Data Sheet Index
Program Flash
Memory (kW/KB)
EUSART/ I
2
C/SPI
CCP/10-bit PWM
Memory Access
Partition
Peripheral Pin
Select
16-bit Timer
Comparator
Data SRAM
(bytes)
12-bit ADC
(ch)
5-bit DAC
Device
PIC16(L)F19155
PIC16(L)F19156
PIC16(L)F19175
PIC16(L)F19176
PIC16(L)F19185
PIC16(L)F19186
PIC16(L)F19195
PIC16(L)F19196
PIC16(L)F19197
Note
1:
(A)
(A)
(A)
(A)
(A)
(A)
(B)
(B)
(B)
8/14
16/28
8/14
16/28
8/14
16/28
8/14
16/28
32/56
256
256
256
256
256
256
256
256
256
1024
2048
1024
2048
1024
2048
1024
2048
4096
24
24
35
35
43
43
59
59
59
20
20
31
31
39
39
45
45
45
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Y
Y
Y
Y
Y
Y
Y
Y
Y
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
1
1
1
1
1
1
1
1
1
4
4
4
4
4
4
4
4
4
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
2/1
2/1
2/1
2/1
2/1
2/1
2/1
2/1
2/1
Y
Y
Y
Y
Y
Y
Y
Y
Y
Debug
(1)
I
I
I
I
I
I
I
I
I
I/O Pins
DataEE
(bytes)
CWG
CLC
PIC16(L)F19155/56/75/76/85/86
Y/Y
Y/Y
Y/Y
Y/Y
Y/Y
I – Debugging integrated on chip.
Data Sheet Index (Unshaded devices are described in this document):
A.
B.
Future Release
DS40001873
PIC16(L)F19155/56/75/76/85/86 Data Sheet, 28/40/44/48-Pin
PIC16(L)F19195/6/7 Data Sheet, Full-Featured 64-Pin Microcontrollers
Note:
For other small form-factor package availability and marking information, please visit
www.microchip.com/packaging
or contact your local sales office.
PIC16(L)F19155/56/75/76/85/86
TABLE 2:
Device
PIC16(L)F19155
PIC16(L)F19156
PIC16(L)F19175
PIC16(L)F19176
PIC16(L)F19185
PIC16(L)F19186
PACKAGES
28-Pin
SPDIP
X
X
28-Pin
SOIC
X
X
28-Pin
SSOP
X
X
28-Pin
UQFN
(4x4)
X
X
X
X
X
X
X
X
X
X
X
X
40-Pin
PDIP
40-Pin
UQFN
(5x5)
44-Pin
TQFP
48-Pin
UQFN
(6x6)
48-Pin
TQFP
(7x7)
Note:
Pin details are subject to change.
FIGURE 1:
28-PIN SSOP, SPDIP AND SOIC PIN DIAGRAM FOR PIC16(L)F19155/56
V
PP
/MCLR/RE3
SEG0/RA0
SEG1/RA1
SEG2/RA2
SEG3/RA3
COM0/SEG4/RA4
V
BAT
/RA5
V
SS
SEG7/RA7
SEG6/RA6
RC0
RC1
COM2/SEG18/RC2
SEG19/RC3
1
2
3
4
28
27
26
25
RB7/ICSPDAT/SEG15
RB6/ICSPCLK/SEG14
RB5/COM1/SEG13
RB4/COM0
RB3/CFLY2/COM6/SEG11
RB2/CFLY1/COM7/SEG10
RB1/SEG9
RB0/SEG8
V
DD
V
SS
RC7/VLCD1/COM4/SEG23
RC6/VLCD2/COM5/SEG22
VLCD3
RC4/SEG20
5
6
7
8
9
10
11
12
13
14
PIC16(L)F19155/56
24
23
22
21
20
19
18
17
16
15
Note 1:
See
Table 3
for location of all peripheral functions.
2017-2019 Microchip Technology Inc.
DS40001923B-page 4
PIC16(L)F19155/56/75/76/85/86
FIGURE 2:
28-PIN UQFN PIN DIAGRAM FOR PIC16(L)F19155/56
28
27
26
25
24
23
22
Note 1:
See
Table 3
for location of all peripheral functions.
2:
All V
DD
and all V
SS
pins must be connected at the circuit board level. Allowing one or more V
SS
or
V
DD
pins to float may result in degraded electrical performance or non-functionality.
3:
The bottom pad of the QFN/UQFN package should be connected to V
SS
at the circuit board level.
2017-2019 Microchip Technology Inc.
RA1/SEG1
RA0/SEG0
RE3/MCLR/V
PP
RB7/ICSPDAT/SEG15
RB6/ICSPCLK/SEG14
RB5/COM1/SEG13
RB4/COM0
RC0
RC1
COM2/SEG18/RC2
SEG19/RC3
SEG20/RC4
VLCD3
COM5/SEG22/VLCD2/RC6
8
9
10
11
12
13
14
SEG2/RA2
SEG3/RA3
COM3/SEG2/RA4
V
BAT
/RA5
V
SS
SEG7/RA7
SEG6/RA6
1
2
3
4
5
6
7
21
20
19
18
17
16
15
RB3/CFLY2/COM6/SEG11
RB2/CFLY1/COM7/SEG10
RB1/SEG9
RB0/SEG8
V
DD
V
SS
RC7/VLCD1/COM4/SEG23
C
PI
(L
16
)F
5/
15
19
56
DS40001923B-page 5
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