fpga - field programmable gate array fpga - arria V GX 13688 labs 544 ios
Parameter Name | Attribute value |
Is it lead-free? | Lead free |
Is it Rohs certified? | conform to |
Maker | Altera (Intel) |
Parts packaging code | BGA |
package instruction | FBGA-1152 |
Contacts | 1152 |
Reach Compliance Code | compliant |
ECCN code | 3A001.A.7.A |
Samacsys Description | FPGA - Field Programmable Gate Array FPGA - Arria V GX 13688 LABs 544 IOs |
maximum clock frequency | 622 MHz |
JESD-30 code | S-PBGA-B1152 |
JESD-609 code | e1 |
length | 35 mm |
Humidity sensitivity level | 3 |
Number of entries | 544 |
Number of logical units | 362730 |
Output times | 544 |
Number of terminals | 1152 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | |
Package body material | PLASTIC/EPOXY |
encapsulated code | BGA |
Encapsulate equivalent code | BGA1152,34X34,40 |
Package shape | SQUARE |
Package form | GRID ARRAY |
Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
power supply | 1.1,1.2/3.3,2.5 V |
Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
Certification status | Not Qualified |
Maximum seat height | 3.5 mm |
Maximum supply voltage | 1.13 V |
Minimum supply voltage | 1.07 V |
Nominal supply voltage | 1.1 V |
surface mount | YES |
technology | CMOS |
Temperature level | OTHER |
Terminal surface | Tin/Silver/Copper (Sn/Ag/Cu) |
Terminal form | BALL |
Terminal pitch | 1 mm |
Terminal location | BOTTOM |
Maximum time at peak reflow temperature | NOT SPECIFIED |
width | 35 mm |
Base Number Matches | 1 |