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SI4133-D-GT

Description
phase locked loops - pll dual band RF tssop-24
CategoryAnalog mixed-signal IC    The signal circuit   
File Size2MB,40 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
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SI4133-D-GT Overview

phase locked loops - pll dual band RF tssop-24

SI4133-D-GT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts24
Reach Compliance Codecompli
Samacsys DescriptiPhase Locked Loops - PLL RF synthesizer with RF1/RF2/IF outpu
Analog Integrated Circuits - Other TypesPHASE LOCKED LOOP
JESD-30 codeR-PDSO-G24
length7.8 mm
Number of functions1
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width4.4 mm

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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