INTEGRATED CIRCUITS
LP2985A-XX
Very low noise, low dropout,
150 mA linear regulator, CMOS
process technology
Product data
Supersedes data of 2003 Jul 31
2003 Aug 18
Philips
Semiconductors
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA linear
regulator, CMOS process technology
LP2985A-XX
GENERAL DESCRIPTION
The LP2985A-XX family are very low-noise, very low-dropout, low
quiescent-current linear regulators designed for battery-powered
applications, although they can also be used for devices powered by
AC-DC converters. The parts are available in a range of preset
output voltages from 2.5 V to 4.5 V. Typical dropout voltages are
only 165 mV at 150 mA and 41 mV at 50 mA. Reverse battery
current is extremely low, 0.5
µA
typical.
For demanding applications, output noise voltage of typically
30
µV
rms
is achieved with a 0.01
µF
capacitor on the bypass pin.
The input voltage can vary from 2.5 to 6.5 V
dc
, providing up to
150 mA output current.
An internal P-channel FET pass transistor maintains an 85
µA
typical supply current, independent of the load current and dropout
voltage. Other features include a 0.01
µA
logic-controlled shutdown,
short circuit and thermal shutdown protection, and reverse battery
protection. The LP2985A-XX also includes an auto-discharge
function which actively dischargers the output voltage to ground
when the device is placed in shutdown.
To accommodate high density layouts, it is packaged in wafer-level
chip-scale package (WL-CSP5) and regular SO5/SOT23-5 package.
WL-CSP5 (bottom view)
SO5 (SOT23-5)
FEATURES
•
Low output noise: 30
µV
rms
•
Low dropout voltages: 165 mV at 150 mA, 41 mV at 50 mA
•
Thermal overload and short circuit protection
•
Reverse battery protection
•
Output current limit
•
85
µA
no load supply current
•
100
µA
typical operating supply current at I
OUT
= 150 mA
•
Preset output voltage of 2.7 V, 2.8 V, and 3.0 V;
other voltages upon request in 100 mV increments
APPLICATIONS
•
Cordless, PCS, and cellular telephones
•
PCMCIA cards and modems
•
Handheld and portable instruments
•
Palmtop computers and electronic planners
SIMPLIFIED DEVICE DIAGRAM
LP2985A-XX
ON
OFF
SHDN
A3
B2
V
OUT
A1
C1
C3
C
IN
1
µF
DC
2.5 V to 6.5 V
V
IN
GND
C
BP
bypass
R
load
(optional)
C
OUT
1
µF
Preset output voltages:
2.5 V to 4.5 V
Top view (Wafer-level CSP pin assignments using JEDEC standard matrix)
SL01866
Figure 1. Simplified device diagram.
2003 Aug 18
2
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA linear
regulator, CMOS process technology
LP2985A-XX
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
LP2985A-XXUK
LP2985A-XXD
NAME
WL-CSP5
SO5/SOT23-5
DESCRIPTION
wafer-level, chip-scale 5 bump package, surface mount
plastic small outline package; 5 leads; body width 1.5 mm
TEMPERATURE
RANGE
–40 to +85
°C
–40 to +85
°C
NOTE:
The device has three (3) voltage output options, indicated by the
XX
on the Type Number. Additional voltage output options may be
available (see Table 1).
XX
LP2985A-27
LP2985A-28
LP2985A-30
VOLTAGE (Typical)
2.7 V
2.8 V
3.0 V
Table 1. Marking code
Each device is marked with a four letter code. The first three letters
designate the product. The fourth letter, represented by ‘x’, is a date
tracking code.
Part
LP2985A-27D, LP2985A-27UK
LP2985A-28UK
LP2985A-30UK
LP2985A-25D (Note 1)
LP2985A-26D (Note 1)
LP2985A-28D
LP2985A-30D
LP2985A-33D (Note 1)
LP2985A-36D (Note 1)
LP2985A-42D (Note 1)
LP2985A-45D (Note 1)
1. Consult factory for availability.
Marking
ACCx
ACAx
AMPx
APXx
APYx
APZx
ARAx
ARBx
ARCx
ARDx
AREx
PIN CONFIGURATION
LP2985A-XX
SHDN
A3
B2
GND
A1
BP
C1
V
OUT
C3
V
IN
PIN DESCRIPTION
BALL
NO.
A1
PIN
NO.
2
SYMBOL
GND
DESCRIPTION
Ground. The bump may also
serve as heat spreader by
soldering it to a large PCB pad or
circuit board ground plane to
maximize power dissipation.
Regulator output. Sources up to
150 mA. Minimum output
capacitor is 1
µF.
Noise Bypass Pin: Low noise of
typically 30 mV
rms
with optional
0.01
µF
bypass capacitor. Larger
bypass capacitor further reduces
noise.
Active-LOW Shutdown Input.
This pin must be actively
terminated. Tie to V
IN
if this
function is not used.
Regulator Input. Supply voltage
ranges from 2.5 V to 6.5 V.
Bypass with a 1
µF
capacitor to
GND.
C1
5
V
OUT
SL01867
B2
Figure 2. WL-CSP5 pin configuration (UK package).
4
BP
A3
V
IN
1
5
V
OUT
3
SHDN
LP2985A
GND
2
C3
SHDN
3
4
BP
1
V
IN
SL02028
Figure 3. SO5/SOT23-5 pin configuration (D package).
2003 Aug 18
3
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA linear
regulator, CMOS process technology
LP2985A-XX
MAXIMUM RATINGS
SYMBOL
V
IN
V
SHDN
V
SHDN
-V
IN
V
OUT
, V
BP
T
stg
T
j
T
amb
R
th(j-a)
P
D
Input voltage
SHDN to GND voltage
SHDN to V
IN
voltage
V
OUT
and BP to GND voltage
Storage temperature range
Junction temperature range
Ambient temperature range
Thermal resistance from junction to ambient
Power dissipation (T
amb
= 25
°C)
(Derating factor above 25
°C)
PARAMETER
MIN.
2.5
–0.3
–0.3
–0.3
–65
–55
–40
–
–
MAX.
+6.5
+6.5
+6.5
V
IN
+ 0.3
+150
+140
+85
224
637
5.1
UNIT
V
V
V
V
°C
°C
°C
°C/W
mW
mW/°C
NOTE:
2. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond
those indicated may adversely affect device reliability. Functional operation under absolute maximum-rated condition is not implied.
Functional operation should be restricted to the Recommended Operating Condition.
3. The absolute maximum power dissipation depends on the ambient temperature and can be calculated using the formula:
T
j
*
T
amb
P
D
+
R
th(j-a)
where T
j
is the junction temperature, T
amb
is the ambient temperature, and R
th(j-a)
is the junction-to-ambient thermal resistance. The
357 mW rating for SOT23-5 appearing under Absolute Maximum Ratings results from substituting the Absolute Maximum junction
temperature, 150
°C,
to T
j
, 70
°C
for T
amb
, and 220
°C/W
for R
th(j-a)
.
2003 Aug 18
4
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA linear
regulator, CMOS process technology
LP2985A-XX
ELECTRICAL CHARACTERISTICS
T
amb
= 25
°C
(see Note 1), V
IN
= V
OUT(nom)
+ 0.5 V, –40
°C ≤
T
amb
≤
+85
°C,
unless otherwise specified.
SYMBOL
V
IN
PARAMETER
Input voltage
I
OUT
= 1 mA; T
amb
= +25
°C;
V
OUT
≥
2.5 V
I
OUT
= 1 mA to 150 mA; –40
°C ≤
T
amb
≤
+85
°C;
V
OUT
≥
2.5 V
I
OUT
= 1 mA, T
amb
= +25
°C,
V
OUT
< 2.5 V
I
OUT
= 1 mA to 150mA; –40
°C ≤
T
amb
≤
+85
°C;
V
OUT
< 2.5 V
I
OUT(max)
I
LIM
I
Q
I
RBC
∆V
lnr
∆V
ldr
Maximum output current
Current limit
Ground pin current
Reverse battery current
Line regulation
Load regulation
2.5 V or (V
OUT
+ 0.1 V)
≤
V
IN
≤
6.5V; I
OUT
= 1 mA
0.1 mA
≤
I
OUT;
C
OUT
= 1.0
µF
I
OUT
= 1 mA
Dropout voltage (Note 2)
I
OUT
= 50 mA
I
OUT
= 150 mA
V
N
Shutdown
V
IH
V
IL
I
SHDN
I
Q(SHDN)
t
SHDN-Delay
R
SD
SHDN input threshold
2.5
2 5 V
≤
V
IN
≤
6.5 V
65
T
amb
= +25
°C
T
amb
= +85
°C
T
amb
= +25
°C
T
amb
= +25
°C
–45
°C ≤
T
amb
≤
+85
°C
1.6
–
–
–
–
–
–
–
300
–
–
–
0.5
0.01
30
–
0.4
100
–
1
150
300
–
V
V
nA
µA
µA
µs
µs
Ω
Output voltage noise
f = 10 Hz to 100 kHz
C
BP
= 0.01
µF
C
OUT
= 10
µF
C
OUT
= 100
µF
I
OUT
= 0 mA
I
OUT
= 150 mA
CONDITIONS
MIN.
2.5
–1.4
–3.0
–3.0
–3.5
150
160
–
–
–
–0.125
–
–
–
–
–
–
TYP.
–
–
–
–
–
–
390
85
100
0.5
0
0.01
1.0
41
165
30
20
MAX.
6.5
1.4
2.0
3.0
3.5
–
–
180
–
–
+0.125
0.02
–
90
–
–
–
UNIT
V
%
%
%
%
mA
mA
µA
µA
µA
%/V
%/mA
mV
mV
mV
µV
RMS
µV
RMS
Output voltage accuracy
SHDN input bias current
SHDN supply current
Shutdown exit delay (Note 3)
Resistance shutdown
discharge
V
SHDN
= V
IN
V
OUT
= 0 V
C
BP
= 0.01
µ
µF
C
OUT
= 1.0
µF;
no load
Thermal protection
T
SHDN
∆T
SHDN
Thermal shutdown junction
temperature
Thermal shutdown
hysteresis
–
–
140
15
–
–
°C
°C
NOTES:
1. Limits are 100% production tested at T
amb
= +25
°C.
Limits over the operating temperature range are guaranteed through correlation using
Statistical Quality Control (SQC) Methods.
2. The dropout voltage is defined as V
IN
– V
OUT
, when V
OUT
is 100 mV below the value of V
OUT
for V
IN
= V
OUT
+ 0.5 V.
(Only applicable for V
OUT
= +2.5 V to +4.5 V.)
3. Time needed for V
OUT
to reach 95% of final value.
2003 Aug 18
5
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