NCV7720
Deca Half-Bridge Driver
The NCV7720 Deca is a ten channel half−bridge driver with
protection features designed specifically for automotive and industrial
motion control applications. The product has independent controls and
diagnostics, and the drivers can be operated in forward, reverse, brake,
and high impedance states. The device is controlled via a 16 bit SPI
interface and is daisy chain compatible.
Features
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MARKING
DIAGRAM
NCV7720G
AWLYYWW
•
Low Quiescent Current Sleep Mode
•
High−Side and Low−Side Drivers
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Connected in Half−Bridge Configurations
Integrated Freewheeling Protection (LS and HS)
0.55 A Peak Current
R
DS(on)
= 1.0
W
(typ)
5 MHz SPI Communication
16 Bit Frame Error Detection
Daisy Chain Compatible with Multiple of 8 bit Devices
Compliance with 3.3 V and 5 V Systems
Undervoltage and Overvoltage Lockout
Discriminated Fault Reporting
Over Current Protection
Over−temperature Protection
Underload Detection
Exposed Pad Package
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
This is a Pb−Free Device
SSOP24 NB EP
CASE 940AK
NCV7720 = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 24 of this data sheet.
Typical Applications
•
Automotive
•
Industrial
•
DC Motor Management for HVAC Application
©
Semiconductor Components Industries, LLC, 2013
May, 2013
−
Rev. 0
1
Publication Order Number:
NCV7720/D
NCV7720
NCV7720
VS1
High−side
Driver
Low−side
Driver
OUT1
13.2 V
MRA4003T3
VS2
HS
LS
OUT2
Voltage
Regulator
VCC
Power On
Reset
HS
LS
OUT3
Watchdog
EN
Control
Logic
HS
LS
HS
OUT4
Protection:
Under Load
Over Temperature
Under−voltage
Over−voltage
Over Current
OUT5
LS
HS
LS
OUT6
SO
SI
HS
16−bit
Serial
Data
Interface
LS
HS
LS
HS
LS
High−side
Driver
Low−side
Driver
GND
OUT7
uC
SCLK
CSB
OUT8
OUT9
OUT10
Figure 1. Typical Application
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2
NCV7720
VS1
DRIVE 1
EN
ENABLE
VS
High Side
Driver
VS1
Wave Shaping
VCC
POR
BIAS
Fault
Reporting
Control
Logic
Wave Shaping
VS
Low Side
Driver
OUT1
SO
SI
SPI
SCLK
CSB
16 Bit Logic
and Latch
LS Under Load
Fault
Overcurrent
Thermal Warning &
Shutdown
VS1
DRIVE2
OUT2
VS2
DRIVE3
OUT3
VS1, VS2
Overvoltage
Lockout
VS2
DRIVE4
OUT4
VS1
DRIVE5
OUT5
VCC
Undervoltage
Lockout
VS2
DRIVE6
OUT6
VS1
DRIVE7
OUT7
VS1
DRIVE8
OUT8
VS2
DRIVE9
OUT9
VS2
DRIVE10
OUT10
GND
GND
GND
GND
VS2
Figure 2. Block Diagram
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3
NCV7720
GND
OUT1
OUT5
OUT7
SI
VCC
SO
EN
OUT9
OUT6
OUT4
GND
1
2
3
4
5
6
7
8
9
10
11
12
EPAD
24
23
22
21
20
19
18
17
16
15
14
13
GND
OUT2
OUT8
VS1
SCLK
CSB
RESERVED
RESERVED
VS2
OUT10
OUT3
GND
Figure 3. Pinout – SSOP24
PIN FUNCTION DESCRIPTION
The pin−out for the Deca Half−Bridge in SSOP24 package is shown in the table below.
Pin#
SSOP24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
EPAD
Symbol
GND
OUT1
OUT5
OUT7
SI
VCC
SO
EN
OUT9
OUT6
OUT4
GND
GND
OUT3
OUT10
VS2
Reserved
Reserved
CSB
SCLK
VS1
OUT8
OUT2
GND
Exposed
Pad
Ground
Half−bridge output 1
Half−bridge output 5
Half−bridge output 7
16 bit serial communication input. 3.3V/5V (TTL) Compatible
−
internally pulled down.
Power supply input for Logic.
16 bit serial communication output. 3.3V/5V Compliant
Enable
−
active high; wakes the device from sleep mode. 3.3V/5V (TTL) Compatible
−
internally pulled
down.
Half−bridge output 9
Half−bridge output 6
Half−bridge output 4
Ground
Ground
Half−bridge output 3
Half−bridge output 10
Power Supply input for outputs 3, 4, 6, 9, and 10. This pin must be connected to VS1 externally.
Reserved for factory use
−
this pin must be grounded.
Reserved for factory use
−
this pin must be grounded.
Chip select bar
−
active low; enables serial communication operation. 3.3V/5V (TTL) Compatible
−
in-
ternally pulled up.
Serial communication clock input. 3.3V/5V (TTL) Compatible
−
internally pulled down.
Power Supply input for outputs 1, 2, 5, 7, 8, and all pre−drivers. This pin must be connected to VS2 ex-
ternally.
Half−bridge output 8
Half−bridge output 2
Ground
Connect to GND or leave unconnected.
Description
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4
NCV7720
MAXIMUM RATINGS
(Voltages are with respect to GND)
Rating
VSx Pin Voltage
(VS1, VS2)
(DC)
(AC), t < 500 ms, Ivsx >
−2
A
( Vcc, SI, SCLK, CSB, SO, EN)
(DC)
(AC)
(AC), t< 500 ms, IOUTx >
−1.1
A
(AC), t< 500 ms, IOUTx < 1 A
(OUT1, ..., OUT10)
Symbol
VSxdcMax
VSxac
VioMax
VoutxDc
VoutxAc
Value
−0.3
to 40
−1.0
−0.3
to 5.5
−0.3
to 40
−0.3
to 40
−1.0
1.0
−2.0
to 2.0
−40
to 150
−55
to 150
260
Unit
V
I/O Pin Voltage
OUTx Pin Voltage
V
V
OUTx Pin Current
IoutxImax
T
J
Tstr
(Note 1)
A
°C
°C
°C
Junction Temperature Range
Storage Temperature Range
Peak Reflow Soldering Temperature: Pb−free 60 to 150 seconds at 217°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. See or download ON Semiconductor’s Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ATTRIBUTES
Characteristic
Short Circuit Reliability Characterization
ESD Capability
Human Body Model per AEC−Q100−002
Machine Model per AEC−Q100−003
Moisture Sensitivity Level
Package Thermal Resistance – Still−air
Junction–to–Ambient
Junction–to–Board
(Note 2)
(Note 3)
(Note 2)
(Note 3)
VSx, OUTx
All Other Pins
Symbol
AECQ10x
Vesd4k
Vesd2k
Vesd200
MSL
R
qJA
R
qJA
Value
Grade A
≥ ±4.0
kV
≥ ±2.0
kV
≥ ±200
V
MSL2
54
26
22
14
−
°C/W
°C/W
°C/W
°C/W
Unit
−
R
YJBOARD
R
YJBOARD
2. Based on JESD51−3, 1.2 mm thick FR4, 2S0P PCB with 2 oz. copper and 18 thermal vias to 600 mm
2
spreader on bottom layer.
3. Based on JESD51−7, 1.2 mm thick FR4, 1S2P PCB with 2 oz. copper and 18 thermal vias to 80x80 mm 1 oz. internal spreader planes.
RECOMMENDED OPERATING CONDITIONS
Parameter
Digital Supply Input Voltage
Battery Supply Input Voltage
DC Output Current
Junction Temperature
Symbol
VCCOp
VSxOp
IxOp
TjOp
Min
3.15
5.5
−
−40
Max
5.25
28
0.55
125
Unit
V
V
A
°C
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Embedded System
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