XC74WL126ASR
CMOS Logic
ETR1321_001
■GENERAL
DESCRIPTION
XC74WL126ASR is dual bus buffer manufactured using silicon gate CMOS processes. The small supply current, which is
one of the features of the CMOS logic, gives way to high speed operations which enables LS-TTL.
With wave forming buffers connected internally, stabilized output can be achieved as the series offers high noise immunity.
As the series is integrated into a mini molded, MSOP-8B package, high density mounting is possible.
■APPLICATIONS
●Palmtops
●Digital
equipment
■FEATURES
High Speed Operations
: tpd = 5.6ns(TYP.) (V
CC
=5V)
Operating Voltage Range
: 2V ~ 5.5V
Low Power Consumption
: 2μA (MAX.)@Ta=25℃
CMOS Logic Dual Bus Buffer
Small Package
: MSOP-8B
■PIN
CONFIGURATION
■FUNCTIONS
INPUT
G
H
H
L
H=High level
L=Low level
X=Don’t care
Z=High impedance
A
H
L
X
OUTPUT
Y
H
L
Z
■ABSOLUTE
MAXIMUM RATINGS
PARAMETER
Supply Voltage
Input Voltage
Output Voltage
Input Diode Current
Output Diode Current
Switch Output Current
V
CC
,GND Current
Power Dissipation (Ta = 25℃)
Storage Temperature Range
Note : Voltage is all ground standardized.
Ta=-40℃~85℃
SYMBOL
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
,I
GND
Pd
Tstg
RATINGS
-0.5~+6.0
-0.5~+6.0
-0.5~V
CC
+0.5
-20
±20
±25
±50
300
-65~+150
UNITS
V
V
V
mA
mA
mA
mA
mW
℃
1/6
XC74WL126ASR
■SWITCHING
ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
V
CC
(V)
3.3
t
PLH
5.0
3.3
5.0
3.3
t
PHL
5.0
3.3
5.0
3.3
t
ZL
5.0
3.3
5.0
3.3
t
ZH
5.0
3.3
5.0
t
LZ
Output Disable Time
t
HZ
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
－
－
－
CONDITIONS
C
L
=15pF
Ta=25℃
MIN.
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
C
L
=50pF
－
－
C
L
=50pF
－
－
－
－
TYP.
5.6
3.8
8.1
5.3
5.6
3.8
8.1
5.3
5.4
3.6
7.9
5.1
5.4
3.6
7.9
5.1
9.5
6.1
9.5
6.1
－
－
－
－
4
6
14
MAX.
8.0
5.5
11.5
7.5
8.0
5.5
11.5
7.5
8.0
5.1
11.5
7.1
8.0
5.1
11.5
7.1
13.2
8.8
13.2
8.8
1.5
1.0
1.5
1.0
10
－
－
Ta=-40℃~85℃
MIN.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
－
－
－
－
－
－
－
MAX.
9.5
6.5
13.0
8.5
9.5
6.5
13.0
8.5
9.5
6.0
13.0
8.0
9.5
6.0
13
8.0
15.0
10.0
15.0
10.0
1.5
1.0
1.5
1.0
10
－
－
(tr=tf=3ns)
UNITS
ns
C
L
=50pF
ns
Delay Time
C
L
=15pF
ns
C
L
=50pF
R
L
=1kΩ
C
L
=15pF
R
L
=1kΩ
C
L
=50pF
R
L
=1kΩ
C
L
=15pF
R
L
=1kΩ
C
L
=50pF
R
L
=1kΩ
C
L
=50pF
R
L
=1kΩ
C
L
=50pF
ns
ns
ns
Output Enable Time
ns
ns
ns
ns
Output Pin Skew
(Note)
tos
LH
ns
tos
HL
C
IN
C
OUT
Cpd
ns
pF
pF
pF
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Note: t
OSLH
and t
OSHL
are the guaranteed parameters.
t
OSLH =
I t
PLHm –
t
PHLn
I
,
t
OSHL =
I t
PHLm –
t
PHLn
I
■NOISE
CHARACTERISTICS
PARAMETER
Non Functional Output Maximum Dynamic V
OL
Non Functional Output Minimum Dynamic V
OL
Minimum Dynamic V
IH
Maximum Dynamic V
IL
SYMBOL
V
OLP
V
OLV
V
IHD
V
ILD
C
L
50pF
50pF
50pF
50pF
V
CC
(V)
5.0
5.0
5.0
5.0
CONDITIONS
Ta=25℃
MIN.
－
-0.8
－
－
TYP.
0.3
-0.3
－
－
MAX.
0.8
－
3.5
1.5
(tr=tf=3ns)
UNITS
V
V
V
V
3/6
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