RNN65C2910DPM77 datasheet, PDF

RNN65C2910DPM77: DescriptionFixed Resistor, Metal Film, 0.25W, 291ohm, 300V, 0.5% +/-Tol, 50ppm/Cel, Through Hole Mount, AXIAL LEADED; CategoryPassive components The resistor; File Size95KB，4 Pages; ManufacturerVishay; Websitehttp://www.vishay.com

Download Datasheet Parametric View All

RNN65C2910DPM77 Overview

Fixed Resistor, Metal Film, 0.25W, 291ohm, 300V, 0.5% +/-Tol, 50ppm/Cel, Through Hole Mount, AXIAL LEADED

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	276723409
package instruction	AXIAL LEADED
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	HERMATICALLY SEALED, PRECISION
structure	Tubular
JESD-609 code	e0
Lead diameter	0.635 mm
Lead length	38.1 mm
Installation features	THROUGH HOLE MOUNT
Number of terminals	2
Maximum operating temperature	175 °C
Package diameter	4.78 mm
Package length	15.8 mm
Package form	Axial
method of packing	BULK
Rated power dissipation(P)	0.25 W
Rated temperature	125 °C
Guideline	MIL-PRF-55182
resistance	291 Ω
Resistor type	FIXED RESISTOR
surface mount	NO
technology	METAL FILM
Temperature Coefficient	50 ppm/°C
Terminal surface	Tin/Lead (Sn/Pb)
Terminal shape	WIRE
Tolerance	0.5%
Operating Voltage	300 V

I would like to ask which manufacturers produce unipolar TMR tunneling effect switches. I only found MDT, and Magne does not have unipolar ones.: I would like to ask which manufacturers produce single-pole TMR switches. I only found MDT, and Magne does not have single-pole ones....; 一沙一世 Sensor

Altium16.1 manufacturing output IPC-2581 and odb++ formats are not working: Altium16.1 manufacturing output IPC-2581 and odb++ formats are not possible.Both formats prompt this error, how to solve it?...; xy598646744 PCB Design

Three Key Points to Successfully Solving FPGA Design Timing Problems: Three Key Points to Successfully Solving FPGA Design Timing Problems...; zxopenljx EE_FPGA Learning Park

[CY8CKIT-149 PSoC 4100S Review] + Software Installation and Program Download: [i=s]This post was last edited by DDZZ669 on 2018-11-21 18:19[/i] [md]## Software Installation According to the [CY8CKIT-149 User Manual]([url=https://bbs.eeworld.com.cn/forum.php?mod=attachment&aid=M...; DDZZ669 MCU

[Project source code] Modify waveform display color based on FPGA Modelsim: This article and design code were written by FPGA enthusiast Xiao Meige. Without the author's permission, this article is only allowed to be copied and reproduced on online forums, and the original au...; 小梅哥 Altera SoC

Custom IP core: In libero soc 11.8, when I customize IP cores, i.e. blocks, I encounter confusions: 1. After encapsulating a module without parameters into a block, I can instantiate, synthesize, and simulate normall...; teleagle FPGA/CPLD

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components