The SN54 / 74LS795 thru SN54 / 74LS798 device types provide a second
source for the 71 / 81LS95 thru 71 / 81LS98 series. These devices are octal
low power Schottky versions of the 70/8095 thru 70/8098 3-STATE Hex
Buffers. The LS795 and LS797 are noninverting and the LS796 and LS798
are inverting functions. On each buffer, one of the two inputs is used as a
control line to gate the output into the high impedance state, while the other
input passes the data through the buffer. On the LS795 and LS796 access is
through a 2-input NOR gate, with all eight 3-STATE enable lines common. On
the LS797 and LS798, four buffers are enabled from one common line and the
other four buffers from another common line. On all device types the 3-STATE
condition is achieved by applying a high logic level to the enable pins.
TRUTH TABLES
LS795
INPUTS
G1
H
X
L
L
G2
X
H
L
L
A
X
X
H
L
OUTPUT
Y
Z
Z
H
L
SN54/74LS795
SN54/74LS796
SN54/74LS797
SN54/74LS798
TRI-STATE OCTAL BUFFERS
LOW POWER SCHOTTKY
LS796
INPUTS
G1
H
X
L
L
G2
X
H
L
L
A
X
X
H
L
OUTPUT
Y
Z
Z
L
H
20
1
J SUFFIX
CERAMIC
CASE 732-03
20
1
N SUFFIX
PLASTIC
CASE 738-03
LS797
INPUTS
G
H
L
L
A
X
H
L
OUTPUT
Y
Z
H
L
LS798
INPUTS
G
H
L
L
A
X
H
L
OUTPUT
Y
Z
L
H
20
1
DW SUFFIX
SOIC
CASE 751D-03
ORDERING INFORMATION
SN54LSXXXJ
Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC
GUARANTEED OPERATING RANGES
Symbol
VCC
TA
IOH
IOL
Supply Voltage
Operating Ambient Temperature Range
Output Current — High
Output Current — Low
Parameter
54
74
54
74
54
74
54
74
Min
4.5
4.75
– 55
0
Typ
5.0
5.0
25
25
Max
5.5
5.25
125
70
– 2.6
– 5.0
8.0
16
Unit
V
°C
mA
mA
FAST AND LS TTL DATA
5-609
SN54/74LS795
•
SN54/74LS796
SN54/74LS797
•
SN54/74LS798
LOGIC DIAGRAMS
VCC G2 A8 Y8 A7 Y7 A6 Y6 A5 Y5
20 19 18 17 16 15 14 13 12 11
VCC G2 A8 Y8 A7 Y7 A6 Y6 A5 Y5
20 19 18 17 16 15 14 13 12 11
1
2 3
G1 A1 Y1
4
A2
5
6 7 8
9
10
Y2 A3 Y3 A4 Y4 GND
1
2 3
G1 A1 Y1
4
A2
5
6 7 8
9
10
Y2 A3 Y3 A4 Y4 GND
SN54/74LS795
SN54/74LS796
VCC G2 A8 Y8 A7 Y7 A6 Y6 A5 Y5
20 19 18 17 16 15 14 13 12 11
VCC G2 A8 Y8 A7 Y7 A6 Y6 A5 Y5
20 19 18 17 16 15 14 13 12 11
1
2 3
G1 A1 Y1
4
A2
5
6 7 8
9
10
Y2 A3 Y3 A4 Y4 GND
1
2 3
G1 A1 Y1
4
A2
5
6 7 8
9
10
Y2 A3 Y3 A4 Y4 GND
SN54/74LS797
SN54/74LS798
FAST AND LS TTL DATA
5-610
SN54/74LS795 THRU SN54/74LS798
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
VIH
VIL
VIK
VOH
Parameter
Input HIGH Voltage
54
Input LOW Voltage
74
Input Clamp Diode Voltage
54
Output HIGH Voltage
74
54, 74
VOL
IOZH
IOZL
IIH
Output LOW Voltage
74
Output Off Current — HIGH
Output Off Current — LOW
Input HIGH Current
– 0.1
Input LOW Current
A Input, Both G at 0.4 V
G Input
A Input, Both G at 2.0 V
IOS
ICC
Short Circuit Current (Note 1)
Power Supply
Current
LS795/LS797
LS795/LS798
– 30
– 0.4
– 0.4
– 20
–130
26
21
0.35
0.5
20
– 20
20
V
µA
µA
µA
mA
mA
µA
mA
mA
mA
VCC = MAX
2.7
3.5
0.25
0.4
V
V
2.5
– 0.65
3.5
0.8
– 1.5
V
V
VCC = MIN, IOH = MAX
IOL = 8.0 mA
IOL = 16 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
Min
2.0
0.7
V
Typ
Max
Unit
V
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
VCC = MIN, IIN = – 18 mA
VCC = MAX, VOUT = 2.7 V
VCC = MAX, VOUT = 0.4 V
VCC = MAX, VIN = 2.7 V
VCC = MAX, VIN = 7.0 V
VCC = MAX, VIN = 0.4 V
VCC = MAX, VIN = 0.5 V
VCC = MAX
IIL
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(TA = 25°C)
Limits
LS795 / LS797
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Parameter
Propagation Delay
Output Enable Time
Output Disable Time
Min
Typ
11
15
16
13
13
19
Max
16
22
25
20
20
27
LS796 / LS798
Min
Typ
6.0
13
17
16
13
18
Max
10
17
27
25
20
27
Unit
ns
ns
ns
VCC = 5.0 V
CL = 15 pF
Test Conditions
CL = 5.0 pF
FAST AND LS TTL DATA
5-611
Case 751D-03 DW Suffix
20-Pin Plastic
SO-20 (WIDE)
-A-
20
11
NOTES:
1.
DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2.
3.
CONTROLLING DIMENSION: MILLIMETER.
DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4.
MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
-B-
1
10
P
0.25 (0.010)
M
B
M
5.
751D 01, AND 02 OBSOLETE, NEW STANDARD
751D 03.
10 PL
G
R X 45°
-T-
C
K
M
SEATING
PLANE
M
D
20 PL
0.25 (0.010)
T
B
S
F
J
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
12.65
7.40
2.35
0.35
0.50
12.95
7.60
2.65
0.49
0.90
INCHES
MIN
MAX
0.499
0.292
0.093
0.014
0.020
0.510
0.299
0.104
0.019
0.035
1.27 BSC
0.25
0.10
0
0.32
0.25
7
0.050 BSC
0.010
0.004
0
0.012
0.009
7
°
°
°
°
10.05
0.25
10.55
0.75
0.395
0.010
0.415
0.029
A
S
Case 732-03 J Suffix
20-Pin Ceramic Dual In-Line
NOTES:
1.
LEADS WITHIN 0.25 mm (0.010) DIA., TRUE
POSITION AT SEATING PLANE, AT MAXIMUM
20
1
11
2.
MATERIAL CONDITION.
DIM L TO CENTER OF LEADS WHEN FORMED
PARALLEL.
10
3.
DIM A AND B INCLUDES MENISCUS.
B
A
F
C
L
N
H
D
SEATING
PLANE
J
M
G
K
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MILLIMETERS
MIN
MAX
23.88
6.60
3.81
0.38
1.40
25.15
7.49
5.08
0.56
1.65
INCHES
MIN
MAX
0.940
0.260
0.150
0.015
0.055
0.990
0.295
0.200
0.022
0.065
2.54 BSC
0.51
0.20
3.18
1.27
0.30
4.06
0.100 BSC
0.020
0.008
0.125
0.050
0.012
0.160
7.62 BSC
0
°
15
°
0.300 BSC
0
°
15
°
0.25
1.02
0.010
0.040
Case 738-03 N Suffix
20-Pin Plastic
-A-
20
1
11
10
NOTES:
1.
DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2.
3.
CONTROLLING DIMENSION: INCH.
DIMENSION L" TO CENTER OF LEAD WHEN
FORMED PARALLEL.
B
C
L
4.
DIMENSION B" DOES NOT INCLUDE MOLD
FLASH.
5.
738 02 OBSOLETE, NEW STANDARD 738 03.
-T-
SEATING
PLANE
K
E
G
F
D
20 PL
0.25 (0.010)
M
N
M
J
20 PL
0.25 (0.010)
T
A
M
M
T
B
M
DIM
A
B
C
D
E
F
G
J
K
L
M
N
MILLIMETERS
MIN
MAX
25.66
6.10
3.81
0.39
27.17
6.60
4.57
0.55
INCHES
MIN
MAX
1.010
0.240
0.150
0.015
1.070
0.260
0.180
0.022
1.27 BSC
1.27
1.77
0.050 BSC
0.050
0.070
2.54 BSC
0.21
2.80
0.38
3.55
0.100 BSC
0.008
0.110
0.015
0.140
7.62 BSC
0
°
15
°
0.300 BSC
0
°
15
°
0.51
1.01
0.020
0.040
FAST AND LS TTL DATA
5-612
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of
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unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
Literature Distribution Centers:
USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036.
tPZH
Open
Closed
EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England.
JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan.
tPZL
Closed
Open
ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
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