NOA1312
Product Preview
High-Precision Ambient
Light Sensor with Three I
2
C
Slave Addresses, EEPROM
and Dark Current
Compensation
Description
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The NOA1312 high−precision ambient light sensor (ALS) is
designed for very high accuracy (better than
±5%
tolerance) handheld
applications. The device integrates a 16−bit ADC, a 2−wire I
2
C digital
interface with three pin−selectable I
2
C slave addresses, internal clock
oscillator, EEPROM and a power down mode. A photopic optical color
filter together with built in dynamic dark current compensation and
precision calibration capability plus excellent IR and 50/60 Hz flicker
rejection enables highly accurate measurements from very low light
levels to full sunlight. The device can support simple count equals lux
readings in interrupt−driven or polling modes. The NOA1312
employs proprietary CMOS image sensing technology from
ON Semiconductor to provide large signal to noise ratio (SNR) and
wide dynamic range (DR) over the entire operating temperature range.
Features
CUDFN6
CU SUFFIX
CASE 505AD
PIN ASSIGNMENT
VSS
INT
SCL
(Top View)
1
VDD
AD
SDA
•
Senses Ambient Light and Provides an Output Count Proportional to
•
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the Ambient Light Intensity
Human Eye Spectral Response using Photopic Optical Filter
Dynamic Dark Current Compensation
Very High Accuracy (better than
±5%
tolerance)
Ev Sensitivity of 5.2 Counts/lux
Three I
2
C Slave Addresses (0x29, 0x39 and 0x49), Pin Selectable
Less than 240
mA
Active Power Consumption in Normal Operation
Ultra−low Quiescent Power Dissipation, less than 100 nA in Power
Down Mode (below 50°C)
Interrupt Signal Notifies Host of Significant Intensity Changes
Internal EEPROM Stores Values to Minimize Programming Time
Register Values Preserved during Power−down Mode
Wide Operating Voltage Range (2.4 V to 3.6 V)
Wide Operating Temperature Range (−40°C to 85°C)
Linear Response over the Full Operating Range
Senses Intensity of Ambient Light from 0.096 lux to Full Sunlight
Programmable Integration Times
No External Components Required
Built−in 16−bit ADC
I
2
C Serial Communication Port Supports Standard and Fast Modes
This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
ORDERING INFORMATION
Device
NOA1312CUTAG
Package
CUDFN6
(Pb−Free)
Shipping
†
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Applications
•
Saves Display Power in Applications such as:
−
Tablets, LED Backlit Displays,
Smart Phones, Netbooks, PDAs,
MP3 Players, GPS
−
Video Recorders
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
©
Semiconductor Components Industries, LLC, 2011
November, 2011
−
Rev. P0
1
Publication Order Number:
NOA1312/D
NOA1312
Vin = 2.4 to 3.6 V
hv
6
R1
1k
4
SDA
VDD
SCL 3
C2
2
INT
0.1
m
1
5
AD
VSS
C3
IC1
100 p
NOA1312
R2
1k
R3
1k
MCU
SDA
SCL
INT
VDD,
NC or
VSS
C
b1
C
b2
C
b3
C
bn
not to exceed 250 pF
including all parasitic
capacitances
ADC
hv
SDA
I
2
C Interface
&
Control
SCL
INT
AD
C1
10
m
Figure 1. Typical Application Circuit
Photo
Diode
Reference
Diode
EEPROM
&
Charge
Pump
Figure 2. Simplified Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin
1
2
3
4
5
Pin Name
VSS
INT
SCL
SDA
AD
Ground pin.
Interrupt request to the host. Active−low, open drain output and requires a 1 kW pull−up resistor.
External I
2
C clock provided by the I
2
C master. Requires a 1 kW pull−up resistor.
Bi−directional data signal for communication between this device and the I
2
C master. Requires a 1 kW
pull−up resistor.
I
2
C slave addresses select pin. Selects one of three I
2
C slave addresses (0x29, 0x39 or 0x49) depend-
ing on if this pin is connected to VDD, NC (open) or VSS at power up. This is not a programmable input,
the connection should not be changed after power up.
Power pin.
Description
6
VDD
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Input power supply
Input voltage range
Output voltage range
Digital output current
Operating Free−Air Temperature Range
Storage Temperature
ESD Capability, Human Body Model (Note 1)
ESD Capability, Charged Device Model (Note 1)
ESD Capability, Machine Model (Note 1)
Moisture Sensitivity Level
Lead Temperature Soldering (Note 2)
Symbol
VDD
V
in
V
out
I
o
T
A
T
STG
ESD
HBM
ESD
CDM
ESD
MM
MSL
T
SLD
Value
4.0
−0.2
to VDD + 0.2
−0.2
to VDD + 0.2
−10
to 10
−40
to 85
−45
to 85
2,000
750 (corner pins), 500 (center pins)
200
5
260
Unit
V
V
V
mA
°C
°C
V
V
V
−
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Charged Device Model tested per ESD−STM5.3.1−1999
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating:
≤
100 mA per JEDEC standard: JESD78
2. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
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NOA1312
Table 3. OPERATING RANGES
Rating
Power supply voltage
Power supply current
Quiescent supply current (Note 3)
Low level input voltage
High level input voltage (Note 4)
Hysteresis of SCL & SDA Schmitt trigger inputs (VDD > 2 V)
Low level output voltage (open drain) at 3 mA sink current (SDA, INT)
Output low current (SDA, INT)
Output fall time from V
IHmin
to V
ILmax
with a bus capacitance, C
b
from
10 pF to 250 pF (Note 4)
Input current of IO pin with an input voltage between 0.1 VDD and 0.9 VDD
Capacitance for IO pin (Note 4)
Operating free−air temperature range
Symbol
VDD
IDD
IDD
qs
V
IL
V
IH
V
hys
V
OL
I
OL
t
of
I
I
C
b
T
A
−40
−0.2
0.7 VDD
0.05 VDD
0
3
−
−10
−
0.4
−
250
10
10
85
Min
2.4
Typ
3.0
140
12
Max
3.6
240
800
0.3 VDD
VDD + 0.2
Unit
V
mA
nA
V
V
V
V
mA
ns
mA
pF
°C
3. Current dissipation when in Power Down mode. 800 nA power down current at 85°C (see Figure 14).
4. Cb = capacitance of one bus line, maximum value including all parasitic capacitances should be less than 250 pF.
Table 4. ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over 2.4 V < VDD < 3.6 V,
−40°C
< T
A
< 85°C, 10 pF < Cb < 100 pF) (Note 5)
Standard Mode
Parameter
SCL clock frequency
Hold time after repeated start condition.
After this period, the first clock pulse is generated.
Low period of SCL clock
High period of SCL clock
Set−up time for repeated START condition
SDA Data hold time
SDA Data set−up time
Rise time of both SDA and SCL (input signals) (Note 6)
Fall time of both SDA and SCL (input signals) (Note 6)
Set−up time for STOP condition
Bus free time between STOP and START condition
Capacitive load for each bus line
Noise margin at the low level for each connected
device (including hysteresis)
Noise margin at the high level for each connected
device (including hysteresis)
Symbol
f
SCL
t
HD;STA
t
LOW
t
HIGH
t
SUSTA
t
HDDAT
t
SUDAT
t
r
t
f
t
SUSTO
t
BUF
C
b
V
nL
V
nH
Min
10
4.0
4.7
4.0
4.7
0
250
5
5
4.0
4.7
−
0.1 VDD
0.2 VDD
−
3.45
−
1000
300
−
−
250
−
−
Max
100
−
Fast Mode
Min
100
0.6
1.3
0.6
0.6
0
100
20 + 0.1C
b
20 + 0.1C
b
0.6
1.3
−
0.1 VDD
0.2 VDD
−
0.9
−
300
300
−
−
250
−
−
Max
400
−
Unit
kHz
mS
mS
mS
mS
mS
nS
nS
nS
mS
mS
pF
V
V
Parameter
Internal Oscillator Frequency
Symbol
f
osc
Typ
1
Typ
1
Unit
MHz
5. Refer to Figure 3 for more information on AC characteristics
6. The rise time and fall time are measured with a pull−up resistor R
p
= 1 kW and C
b
of 250 pF (including all parasitic capacitances). The maximum
t
f
for the SDA and SCL bus lines (300 ns) is longer than the specified maximum t
of
for the output stages (250 ns). This allows series protection
resistors (Rs) to be connected between the SDA/SCL pads and the SDA/SCL bus lines without exceeding the maximum specified t
f
.
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NOA1312
Table 5. OPTICAL CHARACTERISTICS
(Unless otherwise specified, these specifications are for VDD = 3.0 V, T
A
= 25°C)
Parameter
Irradiance responsivity
Trimmed response
Dark response
Illuminance responsivity
Test Conditions
lp
(see Figure 4)
White LED light source, Ev = 100 lux,
Tint = 200 ms (see Figure 7)
Ev = 0 lux, Tint = 400 ms, VDD = 2.4 to
3.6 V,−40_C to 85_C
White LED light source, Ev = 12,603 lux,
Tint = 200 ms
(see Figure 5, Figure 6, Note 7)
Ev = 100 lux, Tint = 200 ms, VDD = 2.4 to
3.6 V, relative to VDD = 3.0 V
Ev = 100 lux, Tint = 200 ms, VDD = 3.0 V,
−40°C
to 0°C, relative to room temperature
(25°C)
Ev = 100 lux, Tint = 200 ms, VDD = 3.0 V,
0°C to 85°C, relative to room temperature
(25°C)
White LED light source, Ev = 0
−
15 lux,
Tint = 200 ms
White LED light source, Ev = 15
−
16,250
lux, Tint = 200 ms (Note 8)
Ev = 100 lux, Tint = 200 ms, VDD = 3.0 V
(Note 9)
Ev = 100 lux, Tint = 200 ms,
−37%
to
+65%, VDD = 2.4 to 3.6 V,
−40°C
to 85°C
(Note 10)
Symbol
R
e
R
v_trim
R
v_dark
R
v_max
494
Min
Typ
550
520
0
546
1
65,535
Max
Unit
nm
Counts
Counts
Counts
Counts vs Vdd
Counts vs Temperature
(−40°C to 0°C)
Counts vs Temperature
(0°C to 85°C)
Linearity (Low Ev)
Linearity (High Ev)
Count stability
Trimming range
dC/dVDD
dC/dT
low
−5
−20
5
20
%
%
dC/dT
high
−5
5
%
L
low
L
high
dC/dt
TRIM
range
(5.2*Ev )−5
−5
−1
315
(5.2*Ev)+2
3.5
1
825
Counts
%
%
Counts
7. The maximum count that can be accumulated in a 16−bit register is 65,535.
8. Linearity (high Ev) is estimated using the following formula:
Linearity (High Ev) = ((Counts(n) – Ideal_counts(n))/ Ideal_counts(n)))* 100
where:
n is an Ev value between 0 lux and 16,250 lux
Ideal_counts (at any Ev): 5.2 counts/lux (Tint = 200 ms)
Linearity values shown above after the final trimming.
9. Count stability is measured over a duration of 5 minutes using a stable white LED at Ev = 100 lux, VDD = 3.0 V, T
A
= 25°C
10. Output counts prior to trimming: low counts = 520/1.65, high counts = 520/0.63.
Figure 3. AC Characteristics
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NOA1312
TYPICAL CHARACTERISTICS
100
OUTPUT COUNTS (Normalized %)
90
80
70
60
50
40
30
20
10
0
Human Eye
ALS
2850 K
200 300
400
500
600
700
800
900
1000
0
Incandescent
0.5
1.0
RATIO
1.5
2.0
2700 K
Fluorescent
5600 K
White LED
5000 K
Fluorescent
WAVELENGTH (nm)
Figure 4. Spectral Response (Normalized)
Figure 5. Light Source Dependency
(Normalized to Fluorescent Light,
Tint = 200 ms)
1000
900
100 k
10 k
OUTPUT COUNTS
OUTPUT COUNTS
1k
100
10
1
800
700
600
500
400
300
Trim to 520 Counts at 100 lux
0.1
1
10
Ev (lux)
100
1k
10 k
200
0
50
100
150
200
250
TRIM CODES
Figure 6. Output Counts vs. Ev, 0−2000 lux
(Tint = 200 ms)
−10
0
−20
100
−30
90
80
−40
70
−50
60
−60
50
40
−70
30
20
−80
10
0
−90
−100
−110
−120
10 20
30
Figure 7. Output Counts and Trim Codes
(100 lux, VDD = 3.0 V, Tint = 200 ms)
−10
0
−20
100
−30
90
80
−40
70
−50
60
−60
50
40
−70
30
20
−80
10
0
−90
10 20
40
50
60
70
80
90
100
110
120
Q
30
40
50
60
70
80
90
100
110
Q
−100
−110
END VIEW
−120
120 SIDE VIEW
−90°
1
90°
6
6 5 4
130
−130
−130
130
2
5
140
−90°
90°
−140
−140
140
3
4
150
150
−150
−150
1 2 3
160
160
−160
−160
TOP VIEW
170
−170
180 170
−170
180
TOP VIEW
Figure 8. Output Counts vs. Angle
(End View, Normalized)
Figure 9. Output Counts vs. Angle
(Side View, Normalized)
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