IRF740AS, SiHF740AS, IRF740AL, SiHF740AL
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
36
9.9
16
Single
D
FEATURES
400
0.55
I
2
PAK
(TO-262)
D
2
PAK
(TO-263)
•
Halogen-free According to IEC 61249-2-21
Definition
• Low Gate Charge Q
g
Results in Simple Drive
Requirement
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
• Fully
Characterized
Capacitance
and
Avalanche Voltage and Current
• Effective C
oss
specified
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
G
G
D
S
D
S
G
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
• High speed Power Switching
TYPICAL SMPS TOPOLOGIES
S
N-Channel MOSFET
• Single Transistor Flyback Xfmr. Reset
• Single Transistor Forward Xfmr. Reset (Both for US Line
Input Only)
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
D
2
PAK (TO-263)
SiHF740AS-GE3
IRF740ASPbF
SiHF740AS-E3
D
2
PAK (TO-263)
SiHF740ASTRL-GE3
a
IRF740ASTRLPbF
a
SiHF740ASTL-E3
a
D
2
PAK (TO-263)
SiHF740ASTRR-GE3
a
IRF740ASTRRPbF
a
SiHF740ASTR-E3
a
I
2
PAK (TO-262)
SiHF740AL-GE3
IRF740ALPbF
SiHF740AL-E3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
e
Pulsed Drain
Linear Derating Factor
Single Pulse Avalanche Energy
b, e
Avalanche Current
a
Repetiitive Avalanche Energy
a
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c, e
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
T
A
= 25 °C
T
C
= 25 °C
Current
a, e
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
for 10 s
LIMIT
400
± 30
10
6.3
40
1.0
630
10
12.5
3.1
125
5.9
- 55 to + 150
300
d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
J
= 25 °C, L = 12.6 mH, R
g
= 25
,
I
AS
= 10 A (see fig. 12).
c. I
SD
10 A, dI/dt
330 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6 mm from case.
e. Uses IRF740A, SiHF740A data and test conditions.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91052
S11-1048-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF740AS, SiHF740AS, IRF740AL, SiHF740AL
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient (PCB
Mounted, Steady-State)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
40
1.0
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
oss
C
oss
eff.
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
V
GS
= 0, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
d
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 30 V
V
DS
= 400 V, V
GS
= 0 V
V
DS
= 320 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 6.0 A
b
V
DS
= 50 V, I
D
= 6.0 A
d
400
-
2.0
-
-
-
-
4.9
-
0.48
-
-
-
-
-
-
-
-
4.0
± 100
25
250
0.55
-
V
V/°C
V
nA
μA
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
d
V
DS
= 1.0 V, f = 1.0 MHz
V
GS
= 0 V
V
DS
= 320 V, f = 1.0 MHz
V
DS
= 0 V to 320 V
c, d
V
GS
= 10 V
I
D
= 10 A, V
DS
= 320 V,
see fig. 6 and 13
b, d
-
-
-
-
-
-
-
-
-
-
1030
170
7.7
1490
52
61
-
-
-
10
35
24
22
-
-
-
-
-
-
36
9.9
16
-
-
-
-
ns
nC
pF
V
DD
= 200 V, I
D
= 10 A,
R
g
= 10
,
R
D
= 19.5
,
see fig. 10
b, d
-
-
-
-
-
-
-
-
240
1.9
10
A
40
2.0
360
2.9
V
ns
μC
G
S
T
J
= 25 °C, I
S
= 10 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 10 A, dI/dt = 100 A/μs
b, d
-
-
-
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 μs; duty cycle
2 %.
c. C
oss
eff. is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80 % V
DS
.
d. Uses IRF740A, SiHF740A data and test conditions.
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2
Document Number: 91052
S11-1048-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF740AS, SiHF740AS, IRF740AL, SiHF740AL
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
10
2
I
D
, Drain-to-Source Current (A)
10
I
D
, Drain-to-Source Current (A)
V
GS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
10
2
10
T
J
= 150
°
C
1
1
T
J
= 25
°
C
20 µs Pulse Width
V
DS
=
50 V
5.0
6.0
7.0
8.0
9.0
10.0
0.1
4.5 V
20 µs Pulse Width
T
J
=
25 °C
0.1
1
10
10
2
10
-2
0.1
4.0
91052_03
91052_01
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
V
GS,
Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
10
2
I
D
, Drain-to-Source Current (A)
10
V
GS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
4.5 V
3.0
2.5
2.0
1.5
1.0
0.5
I
D
= 10 A
V
GS
= 10 V
1
0.1
0.1
91052_02
20 µs Pulse Width
T
J
=
150 °C
1
10
10
2
0.0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
V
DS,
Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
91052_04
T
J,
Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91052
S11-1048-Rev. C, 30-May-11
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF740AS, SiHF740AS, IRF740AL, SiHF740AL
Vishay Siliconix
10
5
C, Capacitance (pF)
10
4
I
SD
, Reverse Drain Current (A)
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
C
iss
C
oss
10
2
10
T
J
= 150
°
C
1
10
3
10
2
T
J
= 25
°
C
10
1
1
91052_05
C
rss
0.1
10
10
2
10
3
91052_07
V
GS
= 0 V
0.2
0.4
0.6
0.8
1.0
1.2
1.4
V
DS,
Drain-to-Source Voltage (V)
V
SD
, Source-to-Drain Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
V
GS
, Gate-to-Source Voltage (V)
I
D
= 10 A
V
DS
= 320 V
V
DS
= 200 V
10
2
Operation in this area limited
by R
DS(on)
10
µs
12
V
DS
= 80 V
I
D
, Drain Current (A)
16
10
100
µs
8
1
ms
T
C
= 25
°C
T
J
= 150
°C
Single Pulse
10
10
2
4
For test circuit
see figure 13
0
0
91052_06
1
10
ms
10
3
10
20
30
40
91052_08
Q
G
, Total Gate Charge (nC)
V
DS
, Drain-to-Source Voltage (V)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
www.vishay.com
4
Document Number: 91052
S11-1048-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF740AS, SiHF740AS, IRF740AL, SiHF740AL
Vishay Siliconix
V
DS
V
GS
10.0
R
g
R
D
D.U.T.
+
- V
DD
I
D
, Drain Current (A)
8.0
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
6.0
Fig. 10a - Switching Time Test Circuit
4.0
V
DS
2.0
90 %
0.0
25
91052_09
50
75
100
125
150
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
T
C
, Case Temperature (°C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
P
DM
t
1
t
2
Notes:
1. Duty Factor, D = t
1
/t
2
2. Peak T
j
= P
DM
x Z
thJC
+ T
C
10
-4
10
-3
10
-2
0.1
1
10
10
-2
Single Pulse
(Thermal Response)
10
-3
10
-5
91052_11
t
1
, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
15 V
V
DS
t
p
V
DS
L
Driver
R
g
20 V
t
p
D.U.T
I
AS
0.01
Ω
+
A
- V
DD
I
AS
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91052
S11-1048-Rev. C, 30-May-11
Fig. 12b - Unclamped Inductive Waveforms
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000