M24C64-MB6T datasheet, PDF - EEWORLD Datasheet

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M24C64-MB6T: Description4K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8; Categorystorage; File Size788KB，54 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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M24C64-MB6T Overview

4K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8

M24C64-MB6T Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	8
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	1.8 V
Rated supply voltage	2.5 V
maximum clock frequency	0.4000 MHz
Processing package description	0.169 INCH, HALOGEN FREE AND ROHS COMPLIANT, TSSOP-8
Lead-free	Yes
EU RoHS regulations	Yes
state	ACTIVE
packaging shape	Rectangle
Package Size	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.6500 mm
terminal coating	Nickel Palladium
Terminal location	pair
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
memory width	8
organize	4K × 8
storage density	32768 deg
operating mode	Synchronize
Number of digits	4096 words
Number of digits	4K
Memory IC type	I2C/2-wire serial electrically erasable read-only memory
serial parallel	serial
Maximum TWC of write cycle	5 ms

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M24C64-W M24C64-R

M24C64-F M24C64-DF

64-Kbit serial I²C bus EEPROM

Datasheet

production data

Features

•

Compatible with all I

C bus modes:

– 1 MHz

– 400 kHz

– 100 kHz

•

Memory array:

– 64 Kbit (8 Kbyte) of EEPROM

– Page size: 32 byte

– Additional Write lockable page (M24C64-D

order codes)

TSSOP8 (DW)

169 mil width

SO8 (MN)

150 mil width

•

Single supply voltage:

– 1.7 V to 5.5 V over –40 °C / +85 °C

– 1.6 V to 5.5 V over 0 °C / +85 °C

•

Write:

– Byte Write within 5 ms

– Page Write within 5 ms

PDIP8 (BN)

UFDFPN8 (MC)

DFN8 - 2x3 mm

UFDFPN5 (MH)

DFN5 -1.7x1.4 mm

•

Random and sequential Read modes

•

Write protect of the whole memory array

•

Enhanced ESD/Latch-Up protection

•

More than 4 million Write cycles

•

More than 200-years data retention

WLCSP (CS)

Thin WLCSP (CT)

Packages

•

PDIP8 ECOPACK2

•

SO8 ECOPACK2

•

TSSOP8 ECOPACK2

•

UFDFPN ECOPACK2

WLCSP

(CU)

Unsawn wafer

•

WLCSP ECOPACK2

•

Unsawn wafer (each die is tested)

March 2018

This is information on a product in full production.

DS6638 Rev 36

1/54

www.st.com

Contents

M24C64-W M24C64-R M24C64-F M24C64-DF

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1

2.2

2.3

2.4

2.5

2.6

Serial Clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Serial Data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Chip Enable (E2, E1, E0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Write Control (WC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

(ground) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.6.1

2.6.2

2.6.3

2.6.4

Operating supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.1

4.2

4.3

4.4

4.5

Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Acknowledge bit (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Device addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.1

Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write Identification Page (M24C64-D only) . . . . . . . . . . . . . . . . . . . . . . 18

Lock Identification Page (M24C64-D only) . . . . . . . . . . . . . . . . . . . . . . 18

ECC (Error Correction Code) and Write cycling . . . . . . . . . . . . . . . . . . 18

Minimizing Write delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 19

Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.2

Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.2.1

2/54

DS6638 Rev 36

List of tables

M24C64-W M24C64-R M24C64-F M24C64-DF

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

WLCSP 4-bump signals vs. bump position. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP 5-bump signals vs. bump position. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

WLCSP 8-bump signals vs bump position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Most significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Least significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Operating conditions (voltage range W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Operating conditions (voltage range R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Operating conditions (voltage range F) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Input parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Cycling performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Memory cell data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DC characteristics (M24C64-W, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

DC characteristics (M24C64-R device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

DC characteristics (M24C64-F, M24C64-DF, device grade 6) . . . . . . . . . . . . . . . . . . . . . . 29

400 kHz AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

1 MHz AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

UFDFPN5 - 1.7 × 1.4 mm, 0.55 mm thickness, ultra thin fine pitch

dual flat package, no lead - package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch dual flat package,

no lead - package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

TSSOP8 – 3 x 4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline,

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width,

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package mechanical data. . . . . . . . . . . . 40

Ultra Thin WLCSP- 4-bump, 0.795 x 0.674 mm, wafer level chip

scale package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

WLCSP- 5-bump, 0.959 x 1.073 mm, 0.4 mm pitch wafer level chip scale

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Ordering information scheme (unsawn wafer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

4/54

DS6638 Rev 36

M24C64-W M24C64-R M24C64-F M24C64-DF

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Figure 21.

Figure 22.

Figure 23.

Figure 24.

Figure 25.

Figure 26.

Figure 27.

Figure 28.

Figure 29.

Figure 30.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8-pin package connections, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

UFDFPN5 (DFN5) package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP 4 bump ultra thin package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP 5-bump connections (M24C64-FCS6TP/K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP 8-bump thin connections (M24C64-DFCT6TP/K) . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Chip enable inputs connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Write mode sequences with WC = 0 (data write enabled) . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write mode sequences with WC = 1 (data write inhibited) . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Read mode sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Maximum Rbus value versus bus parasitic capacitance (Cbus) for

an I2C bus at maximum frequency fC = 400 kHz

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Maximum R

bus

value versus bus parasitic capacitance C

bus

) for

an I

C bus at maximum frequency f

= 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

UFDFPN5 – 1.7x1.4 mm, 0.55 mm thickness, ultra thin fine pitch

dual flat package, no lead - package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

UFDFPN5 - 5-lead, 1.7 × 1.4 mm, 0.55 mm thickness, ultra thin fine pitch

dual flat package, no lead recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch

dual flat package, no lead - package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

TSSOP8 – 3x4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline,

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width, package outline . 38

SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width,

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package outline . . . . . . . . . . . . . . . . . . . 40

Ultra Thin WLCSP- 4-bump, 0.795 x 0.674 mm,wafer level chip

scale package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Thin WLCSP- 4-bump, 0.795 x 0.674 mm, wafer level chip scale

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

WLCSP 5-bump, 0.959 x 1.073 mm, 0.4 mm pitch wafer level chip scale

(M24C64-FCS6TP/K)- package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

WLCSP - 5-bump, 0.959 x 1.073 mm, 0.4 mm pitch wafer level chip scale

recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

DS6638 Rev 36

5/54

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Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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