PCA9545A/45B/45C
4-channel I
2
C-bus switch with interrupt logic and reset
Rev. 07 — 19 June 2009
Product data sheet
1. General description
The PCA9545A/45B/45C is a quad bidirectional translating switch controlled via the
I
2
C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any
individual SCx/SDx channel or combination of channels can be selected, determined by
the contents of the programmable control register. Four interrupt inputs, INT0 to INT3, one
for each of the downstream pairs, are provided. One interrupt output, INT, acts as an AND
of the four interrupt inputs.
An active LOW reset input allows the PCA9545A/45B/45C to recover from a situation
where one of the downstream I
2
C-buses is stuck in a LOW state. Pulling the RESET pin
LOW resets the I
2
C-bus state machine and causes all the channels to be deselected as
does the internal power-on reset function.
The pass gates of the switches are constructed such that the V
DD
pin can be used to limit
the maximum high voltage which will be passed by the PCA9545A/45B/45C. This allows
the use of different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can
communicate with 5 V parts without any additional protection. External pull-up resistors
pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant.
The PCA9545A, PCA9545B and PCA9545C are identical except for the fixed portion of
the slave address.
2. Features
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
1-of-4 bidirectional translating switches
I
2
C-bus interface logic; compatible with SMBus standards
4 active LOW interrupt inputs
Active LOW interrupt output
Active LOW reset input
2 address pins allowing up to 4 devices on the I
2
C-bus
Alternate address versions A, B and C allow up to a total of 12 devices on the bus for
larger systems or to resolve address conflicts
Channel selection via I
2
C-bus, in any combination
Power-up with all switch channels deselected
Low R
on
switches
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
NXP Semiconductors
PCA9545A/45B/45C
4-channel I
2
C-bus switch with interrupt logic and reset
I
5 V tolerant Inputs
I
0 Hz to 400 kHz clock frequency
I
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
I
Latch-up protection exceeds 100 mA per JESD78
I
Three packages offered: SO20, TSSOP20, and HVQFN20
3. Ordering information
Table 1.
Ordering information
Package
Name
PCA9545ABS
PCA9545AD
PCA9545APW
PCA9545BPW
PCA9545CPW
HVQFN20
SO20
TSSOP20
Description
Version
plastic thermal enhanced very thin quad flat package; SOT662-1
no leads; 20 terminals; body 5
×
5
×
0.85 mm
plastic small outline package; 20 leads;
body width 7.5 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT163-1
SOT360-1
Type number
3.1 Ordering options
Table 2.
Ordering options
Topside mark
9545A
PCA9545AD
PA9545A
PA9545B
PA9545C
Temperature range
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
−40 °C
to +85
°C
Type number
PCA9545ABS
PCA9545AD
PCA9545APW
PCA9545BPW
PCA9545CPW
PCA9545A_45B_45C_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 19 June 2009
2 of 28
NXP Semiconductors
PCA9545A/45B/45C
4-channel I
2
C-bus switch with interrupt logic and reset
5.2 Pin description
Table 3.
Symbol
A0
A1
RESET
INT0
SD0
SC0
INT1
SD1
SC1
V
SS
INT2
SD2
SC2
INT3
SD3
SC3
INT
SCL
SDA
V
DD
[1]
Pin description
Pin
SO20, TSSOP20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
HVQFN20
19
20
1
2
3
4
5
6
7
8
[1]
9
10
11
12
13
14
15
16
17
18
address input 0
address input 1
active LOW reset input
active LOW interrupt input 0
serial data 0
serial clock 0
active LOW interrupt input 1
serial data 1
serial clock 1
supply ground
active LOW interrupt input 2
serial data 2
serial clock 2
active LOW interrupt input 3
serial data 3
serial clock 3
active LOW interrupt output
serial clock line
serial data line
supply voltage
Description
HVQFN20 package die supply ground is connected to both the V
SS
pin and the exposed center pad. The
V
SS
pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,
and board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the PCB in the thermal pad region.
PCA9545A_45B_45C_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 19 June 2009
5 of 28