IP4286CZ6
Integrated 4-channel ESD protection
Rev. 01 — 20 April 2009
Objective data sheet
1. Product profile
1.1 General description
The IP4286CZ6 is designed to protect the capacitive loads of Input/Output (I/O) ports
(such as USB 2.0, Ethernet, DVI etc.) from being damaged by ElectroStatic Discharge
(ESD).
To provide ESD protection to downstream signal and supply components, the IP4286CZ6
incorporates four pairs of ultra-low capacitance rail-to-rail diodes plus two Zener diodes.
This provides protection against contact discharge voltages as high as
±8
kV in
accordance with IEC 61000-4-2, level 4.
The ESD protection is independent of the supply voltage due to the rail-to-rail diodes
being connected to a Zener diode.
The IP4286CZ6 is fabricated using monolithic silicon technology and integrates 4 ultra-low
capacitance rail-to-rail ESD protection diodes plus two Zener diodes.
1.2 Features
I
Pb-free and RoHS compliant
I
ESD IEC 61000-4-2 level 4,
±8
kV contact discharge compliant protection
I
Four input ESD rail-to-rail protection diodes with ultra-low input capacitance of 0.6 pF
maximum
I
Low-voltage clamping due to integrated Zener diodes
1.3 Applications
General-purpose downstream ESD protection high frequency analog signals and
high-speed serial data transmission for ports inside:
I
PC/Notebook USB 2.0/IEEE 1394 ports
I
Cellular and PCS mobile handsets
I
DVI interfaces
I
HDMI interfaces
I
Cordless telephones
I
Wireless data (WAN/LAN) systems
I
PDAs
NXP Semiconductors
IP4286CZ6
Integrated 4-channel ESD protection
2. Pinning information
Table 1.
Pin
1
2
3
4
5
6
Pinning
Description
ESD protection for I/O signals
ground
ESD protection for I/O signals
ESD protection for I/O signals
ground
ESD protection for I/O signals
6
5
bottom view
4
1
2
3
1
2
3
6
5
4
6
5
4
Simplified outline
Graphic symbol
TSOP6/SC-88
1
2
3
XSON6
001aaj836
3. Ordering information
Table 2.
Ordering information
Package
Name
IP4286CZ6-TTD
IP4286CZ6-TBF
IP4286CZ6-TTY
TSOP6
XSON6
SC-88
Description
plastic surface-mounted package (TSOP6); 6 leads
Version
SOT457
Type number
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1
×
1.45
×
0.5 mm
plastic surface-mounted package; 6 leads
SOT363
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
ESD
T
stg
V
I
Parameter
electrostatic discharge
voltage
storage temperature
input voltage
Conditions
IEC 61000-4-2, level 4,
contact discharge
Min
−8
−55
−0.5
Max
+8
+125
+5.5
Unit
kV
°C
V
IP4286CZ6_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 20 April 2009
2 of 12
NXP Semiconductors
IP4286CZ6
Integrated 4-channel ESD protection
5. Characteristics
Table 4.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol
Parameter
Conditions
pins 1, 3, 4 and 6 to ground;
V
I
= 3.3 V; f = 1 MHz
pins 1, 3, 4 and 6 to ground;
V
I
= 3.0 V
pin 5 and pin 2
pin 5 and pin 2; I = 1 mA
[1]
[1]
Min Typ
-
-
-
6
-
0.6
-
20
-
0.7
Max
-
100
-
9
-
Unit
pF
nA
pF
V
V
C
(I/O-GND)
input/output to ground
capacitance
I
LR
C
(zd-GND)
V
BRzd
V
F
[1]
reverse leakage current
Zener diode to ground
capacitance
Zener diode breakdown
voltage
forward voltage
Guaranteed by design.
6. Application information
6.1 Typical application
The IP4286CZ6 is capable of protecting both USB data lines of a USB 2.0 port from
Electrostatic Discharge and is optimized to protect two USB 2.0 ports simultaneously. A
typical application is shown in
Figure 1.
V
BUS
D
D
GND
IP4286CZ6
V
BUS
D
D
GND
001aaj837
Fig 1.
Application diagram for protecting two USB ports
IP4286CZ6_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 20 April 2009
3 of 12
NXP Semiconductors
IP4286CZ6
Integrated 4-channel ESD protection
7. Package outline
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
HE
v
M
A
6
5
4
Q
pin 1
index
A
A1
c
1
2
3
Lp
e
bp
w
M
B
detail X
0
1
scale
2 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
1.1
0.9
A1
0.1
0.013
bp
0.40
0.25
c
0.26
0.10
D
3.1
2.7
E
1.7
1.3
e
0.95
HE
3.0
2.5
Lp
0.6
0.2
Q
0.33
0.23
v
0.2
w
0.2
y
0.1
OUTLINE
VERSION
SOT457
REFERENCES
IEC
JEDEC
JEITA
SC-74
EUROPEAN
PROJECTION
ISSUE DATE
05-11-07
06-03-16
Fig 2.
IP4286CZ6_1
Package outline SOT457 (TSOP6)
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 20 April 2009
4 of 12
NXP Semiconductors
IP4286CZ6
Integrated 4-channel ESD protection
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
L
1
L
(2)
e
6
e
1
5
e
1
4
6×
(2)
A
A
1
D
E
terminal 1
index area
0
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
(1)
max
0.5
A
1
max
0.04
b
0.25
0.17
D
1.5
1.4
E
1.05
0.95
e
0.6
e
1
0.5
L
0.35
0.27
L
1
0.40
0.32
1
scale
2 mm
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
OUTLINE
VERSION
SOT886
REFERENCES
IEC
JEDEC
MO-252
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-07-15
04-07-22
Fig 3.
IP4286CZ6_1
Package outline SOT886 (XSON6)
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 20 April 2009
5 of 12