SPC560P34L3B0ADR datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> SPC560P34L3B0ADR

SPC560P34L3B0ADR: DescriptionRISC MICROCONTROLLER; CategoryThe embedded processor and controller Microcontrollers and processors; File Size825KB，103 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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SPC560P34L3B0ADR Overview

RISC MICROCONTROLLER

SPC560P34L3B0ADR Parametric

Parameter Name	Attribute value
Maker	STMicroelectronics
Reach Compliance Code	compli
ECCN code	3A991.A.2
Has ADC	YES
Address bus width
bit size	32
maximum clock frequency	40 MHz
DMA channel	YES
External data bus width
length	14 mm
Number of I/O lines	64
Number of terminals	100
PWM channel	YES
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
speed	40 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	14 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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SPC560P34L1, SPC560P34L3

SPC560P40L1, SPC560P40L3

32-bit Power Architecture

based MCU with 320 KB Flash memory

and 20 KB RAM for automotive chassis and safety applications

Datasheet

−

production data

Features

■

Up to 64 MHz, single issue, 32-bit CPU core

complex (e200z0h)

– Compliant with Power Architecture

embedded category

– Variable Length Encoding (VLE)

Memory organization

– Up to 256 KB on-chip code flash memory

with ECC and erase/program controller

– Additional 64 (4 × 16) KB on-chip data

flash memory with ECC for EEPROM

emulation

– Up to 20 KB on-chip SRAM with ECC

Fail-safe protection

– Programmable watchdog timer

– Non-maskable interrupt

– Fault collection unit

Nexus Class 1 interface

Interrupts and events

– 16-channel eDMA controller

– 16 priority level controller

– Up to 25 external interrupts

– PIT implements four 32-bit timers

– 120 interrupts are routed via INTC

General purpose I/Os

– Individually programmable as input, output

or special function

– 37 on LQFP64

– 64 on LQFP100

1 general purpose eTimer unit

– 6 timers each with up/down capabilities

– 16-bit resolution, cascadable counters

– Quadrature decode with rotation direction

flag

– Double buffer input capture and output

compare

LQFP100 (14 x 14 x 1.4 mm)

LQFP64 (10 x 10 x 1.4 mm)

■

Communications interfaces

– 2 LINFlex channels (1× Master/Slave, 1×

Master only)

– Up to 3 DSPI channels with automatic chip

select generation (up to 8/4/4 chip selects)

– Up to 2 FlexCAN interface (2.0B Active)

with 32 message buffers

– 1 safety port based on FlexCAN with 32

message buffers and up to 8 Mbit/s at

64 MHz capability usable as second CAN

when not used as safety port

One 10-bit analog-to-digital converter (ADC)

– Up to 16 input channels (16 on LQFP100 /

12 on LQFP64)

– Conversion time < 1 µs including sampling

time at full precision

– Programmable Cross Triggering Unit (CTU)

– 4 analog watchdogs with interrupt

capability

On-chip CAN/UART bootstrap loader with Boot

Assist Module (BAM)

1 FlexPWM unit: 8 complementary or

independent outputs with ADC synchronization

signals

Device summary

Code flash memory

Package

192 KB

256 KB

SPC560P40L3

SPC560P40L1

■

Table 1.

LQFP100

LQFP64

SPC560P34L3

SPC560P34L1

September 2013

This is information on a product in full production.

Doc ID 16100 Rev 7

1/103

www.st.com

Contents

SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1

1.2

1.3

1.4

1.5

Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Feature details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

1.5.1

1.5.2

1.5.3

1.5.4

1.5.5

1.5.6

1.5.7

1.5.8

1.5.9

1.5.10

1.5.11

1.5.12

1.5.13

1.5.14

1.5.15

1.5.16

1.5.17

1.5.18

1.5.19

1.5.20

1.5.21

1.5.22

1.5.23

1.5.24

1.5.25

1.5.26

1.5.27

1.5.28

High performance e200z0 core processor . . . . . . . . . . . . . . . . . . . . . . . 13

Crossbar switch (XBAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Enhanced direct memory access (eDMA) . . . . . . . . . . . . . . . . . . . . . . . 14

Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Static random access memory (SRAM) . . . . . . . . . . . . . . . . . . . . . . . . . 15

Interrupt controller (INTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

System status and configuration module (SSCM) . . . . . . . . . . . . . . . . . 16

System clocks and clock generation . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Frequency-modulated phase-locked loop (FMPLL) . . . . . . . . . . . . . . . . 17

Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Internal RC oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Periodic interrupt timer (PIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

System timer module (STM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Software watchdog timer (SWT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Fault collection unit (FCU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

System integration unit – Lite (SIUL) . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Boot and censorship . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Error correction status module (ECSM) . . . . . . . . . . . . . . . . . . . . . . . . . 19

Peripheral bridge (PBRIDGE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Controller area network (FlexCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Safety port (FlexCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Serial communication interface module (LINFlex) . . . . . . . . . . . . . . . . . 22

Deserial serial peripheral interface (DSPI) . . . . . . . . . . . . . . . . . . . . . . 23

Pulse width modulator (FlexPWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

eTimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Analog-to-digital converter (ADC) module . . . . . . . . . . . . . . . . . . . . . . . 25

Cross triggering unit (CTU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Nexus Development Interface (NDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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1.5.29

1.5.30

1.5.31

Contents

Cyclic redundancy check (CRC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

IEEE 1149.1 JTAG controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

On-chip voltage regulator (VREG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . 29

2.1

2.2

Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

2.2.1

2.2.2

2.2.3

Power supply and reference voltage pins . . . . . . . . . . . . . . . . . . . . . . . 33

System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Pin multiplexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

3.1

3.2

3.3

3.4

3.5

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

3.5.1

3.5.2

Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

General notes for specifications at maximum junction temperature . . . 52

3.6

3.7

3.8

Electromagnetic interference (EMI) characteristics . . . . . . . . . . . . . . . . . 54

Electrostatic discharge (ESD) characteristics . . . . . . . . . . . . . . . . . . . . . 54

Power management electrical characteristics . . . . . . . . . . . . . . . . . . . . . 54

3.8.1

3.8.2

Voltage regulator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . 54

Voltage monitor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 57

3.9

3.10

Power up/down sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

3.10.1

3.10.2

3.10.3

3.10.4

3.10.5

NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

DC electrical characteristics (5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

DC electrical characteristics (3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Input DC electrical characteristics definition . . . . . . . . . . . . . . . . . . . . . 63

I/O pad current specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

3.11

3.12

3.13

3.14

Main oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 65

FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

16 MHz RC oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . 68

Analog-to-digital converter (ADC) electrical characteristics . . . . . . . . . . . 68

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Contents

3.14.1

3.14.2

SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3

Input impedance and ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

ADC conversion characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

3.15

Flash memory electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 74

3.15.1

3.15.2

3.15.3

Program/Erase characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Flash memory power supply DC characteristics . . . . . . . . . . . . . . . . . . 75

Start-up/Switch-off timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

3.16

3.17

AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

3.16.1

Pad AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

3.17.1

3.17.2

3.17.3

3.17.4

3.17.5

RESET pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

IEEE 1149.1 interface timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Nexus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

External interrupt timing (IRQ pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

4.1

4.2

ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

4.2.1

4.2.2

LQFP100 mechanical outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . 92

LQFP64 mechanical outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

Appendix A Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

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List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Table 44.

Table 45.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

SPC560P34/SPC560P40 device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

SPC560P40 device configuration differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

SPC560P34/SPC560P40 series block summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Parameter classifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Recommended operating conditions (5.0 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Recommended operating conditions (3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

LQFP thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

EMI testing specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

ESD ratings, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Approved NPN ballast components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Voltage regulator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Low voltage monitor electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

PAD3V5V field description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

DC electrical characteristics (5.0 V, NVUSRO[PAD3V5V] = 0) . . . . . . . . . . . . . . . . . . . . . 60

Supply current (5.0 V, NVUSRO[PAD3V5V] = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

DC electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1) . . . . . . . . . . . . . . . . . . . . . 62

Supply current (3.3 V, NVUSRO[PAD3V5V] = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

I/O supply segment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

I/O consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Main oscillator output electrical characteristics (5.0 V, NVUSRO[PAD3V5V] = 0) . . . . . . . 65

Main oscillator output electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1) . . . . . . . 66

Input clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

16 MHz RC oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

ADC conversion characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Program and erase specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Flash memory module life. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Flash memory read access timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Flash memory power supply DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 75

Start-up time/Switch-off time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Output pin transition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

RESET electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

JTAG pin AC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Nexus debug port timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

External interrupt timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

DSPI timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

LQFP100 package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

LQFP64 package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Doc ID 16100 Rev 7

5/103

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