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EQRG13D2L-98.304MTR

Description
CRYSTAL OSCILLATOR, CLOCK, HSCL OUTPUT
CategoryPassive components    oscillator   
File Size1MB,12 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance
Download Datasheet Parametric View All

EQRG13D2L-98.304MTR Overview

CRYSTAL OSCILLATOR, CLOCK, HSCL OUTPUT

EQRG13D2L-98.304MTR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerECLIPTEK
Reach Compliance Codecompli
Other featuresSTANDBY; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR, 14 INCH
maximum descent time0.5 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee4
Installation featuresSURFACE MOUNT
Nominal operating frequency98.304 MHz
Maximum operating temperature70 °C
Minimum operating temperature
Oscillator typeHSCL
Output load50 OHM
physical size7.0mm x 5.0mm x 1.8mm
longest rise time0.5 ns
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Ecliptek | EQRG13 Series Oscillator
http://www.ecliptek.com/oscillators/EQRG13/
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| 714-433-1200 |
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EQRG13 Series Oscillator
Quartz Crystal Clock Oscillators XO (SPXO) HCSL 3.3Vdc 6 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)
2011/65 +
2015/863
168 SVHC
Revision C 06/26/2014
Electrical Specifications
Nominal Frequency
10.000MHz to 200.000MHz
Some frequencies within this range may not be available.
Frequency Tolerance/Stability
Inclusive of all conditions: Calibration Tolerance (at 25°C), Frequency
Stability over the Operating Temperature Range, Supply Voltage
Change, Output Load Change, First Year Aging at 25°C, Shock, and
Vibration
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum
0°C to +70°C
-20°C to +70°C
-40°C to +85°C
±3ppm Maximum First Year
3.3V
DC
±5%
Without Load
30mA Maximum
600mV
DC
Minimum, 740mV
DC
Typical, 850mV
DC
Maximum
-150mV
DC
Minimum, 0mV
DC
Typical, 150mV
DC
Maximum
Measured at 50% of waveform
50 ±10(%)
50 ±5(%)
Measured at 0.175V
DC
to 0.525V
DC
of waveform
500pSec Maximum
650mV Minimum, 740mV Typical, 850mV Maximum
Between Output and Ground
50 Ohms
HCSL
Click to Open Phase Noise Table
Standby (on Pad 1)
Standby (on Pad 2)
70% of V
DD
Minimum or No Connect to Enable Output and
Complementary Output
30% of V
DD
Maximum to Disable Output and Complementary Output
(High Impedance)
10mSec Maximum
Operating Temperature Range
Aging at 25°C
Supply Voltage
Input Current
Output Voltage Logic High (V
OH
)
Output Voltage Logic Low (V
OL
)
Duty Cycle
Rise Time/Fall Time
Output Swing (dVOpp)
Load Drive Capability
Output Logic Type
Phase Noise
Output Control Function
Output Control Input Voltage Logic High
(Vih)
Output Control Input Voltage Logic Low
(Vil)
Standby Output Enable Time
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28-Jan-2016 2:24 PM

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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