STW80NF10
N-CHANNEL 100V - 0.012Ω - 80A TO-247
LOW GATE CHARGE STripFET™ POWER MOSFET
TYPE
STW80NF10
s
s
s
s
V
DSS
100 V
R
DS(on)
< 0.015
Ω
I
D
80 A
TYPICAL R
DS
(on) = 0.012Ω
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
APPLICATION ORIENTED
CHARACTERIZATION
2
1
3
TO-247
DESCRIPTION
This Power Mosfet series realized with STMicro-
electronics unique STripFET process has specifical-
ly been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters for Telecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
HIGH-EFFICIENCY DC-DC CONVERTERS
s
UPS AND MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(*)
I
D
I
DM
(
q
)
P
TOT
dv/dt (1)
E
AS
(2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 kΩ)
Gate- source Voltage
Drain Current (continuos) at T
C
= 25°C
Drain Current (continuos) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
100
100
±20
80
50
320
300
2
9
245
–65 to 175
175
(1) I
SD
≤80A,
di/dt
≤300A/µs,
V
DD
≤
V
(BR)DSS
, T
j
≤
T
JMAX.
(2) Starting T
j
= 25°C, I
D
= 80A, V
DD
= 50V
Unit
V
V
V
A
A
A
W
W/°C
V/ns
mJ
°C
°C
(
q
) Pulse width limited by safe operating area
(*) Limited by wire bonding
April 2001
1/8
STW80NF10
THERMAL DATA
Rthj-case
Rthj-amb
T
l
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
0.5
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS
(TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V
(BR)DSS
I
DSS
I
GSS
Parameter
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
Test Conditions
I
D
= 250 µA, V
GS
= 0
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 °C
V
GS
= ±20V
Min.
100
1
10
±100
Typ.
Max.
Unit
V
µA
µA
nA
ON (1)
Symbol
V
GS(th)
R
DS(on)
I
D(on)
Parameter
Gate Threshold Voltage
Static Drain-source On
Resistance
On State Drain Current
Test Conditions
V
DS
= V
GS
, I
D
= 250µA
V
GS
= 10V, I
D
= 40 A
V
DS
> I
D(on)
x R
DS(on)max,
V
GS
= 10V
80
Min.
2
Typ.
3
0.012
Max.
4
0.015
Unit
V
Ω
A
DYNAMIC
Symbol
g
fs
(1)
C
iss
C
oss
C
rss
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
V
DS
> I
D(on)
x R
DS(on)max,
I
D
=40 A
V
DS
= 25V, f = 1 MHz, V
GS
= 0
Min.
Typ.
20
4300
600
240
Max.
Unit
S
pF
pF
pF
2/8
STW80NF10
ELECTRICAL CHARACTERISTICS
(CONTINUED)
SWITCHING ON
Symbol
t
d(on)
t
r
Q
g
Q
gs
Q
gd
Parameter
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V
DD
= 50V, I
D
= 40A
R
G
= 4.7Ω V
GS
= 10V
(see test circuit, Figure 3)
V
DD
= 80V, I
D
= 80A,
V
GS
= 10V
Min.
Typ.
40
145
140
23
51
189
Max.
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
Symbol
t
d(off)
Parameter
Turn-off-Delay Time
Test Conditions
V
DD
= 27V, I
D
= 40A,
R
G
= 4.7Ω, V
GS
= 10V
(see test circuit, Figure 3)
Vclamp =80V, I
D
=80A
R
G
= 4.7Ω, V
GS
= 10V
(see test circuit, Figure 5)
Min.
Typ.
134
Max.
Unit
ns
t
f
t
d(off)
t
f
t
c
Symbol
I
SD
I
SDM
(1)
V
SD
(2)
t
rr
Fall Time
Off-voltage Rise Time
Fall Time
Cross-over Time
Parameter
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
I
SD
= 80A, V
GS
= 0
I
SD
= 80A, di/dt = 100A/µs,
V
DD
= 50V, T
j
= 150°C
(see test circuit, Figure 5)
Test Conditions
Min.
115
111
125
185
Typ.
Max.
80
320
1.5
155
ns
ns
ns
ns
Unit
A
A
V
ns
SOURCE DRAIN DIODE
Q
rr
I
RRM
Reverse Recovery Charge
Reverse Recovery Current
850
11
nC
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedence
3/8
STW80NF10
Normalized Gate Thereshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
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