Preliminary
EM7323SU16H
2Mx16 Async. / Page StRAM
Document Title
2M x 16Bit Asynchronous / Page Mode StRAM
Revision History
Revision No.
0.0
History
Initial Draft
Draft Date
Oct. 23 , 2007
Remark
Preliminary
Emerging Memory & Logic Solutions Inc.
4F Korea Construction Financial Cooperative B/D, 301-1 Yeon-Dong, Jeju-Si, Jeju-Do, Rep.of Korea
Tel : +82-64-740-1700 Fax : +82-64-740-1749~1750 / Homepage : www.emlsi.com
Zip Code : 690-717
The attached datasheets are provided by EMLSI reserve the right to change the specifications and products. EMLSI will answer to
your questions about device. If you have any questions, please contact the EMLSI office.
1
Rev. 0.0
Preliminary
EM7323SU16H
2Mx16 Async. / Page StRAM
2M x16 Bit Async./Page StRAM
FEATURES
- Single power supply voltage of 2.6 to 3.3V
- Direct TTL compativility for all inputs and outputs.
- Deep power-down mode : Memory cell data invalid.
- Supplied in KGD(Known Good Die) form.
- Page operation mode
Page read operation by 8 words.
- Logic compatible with SRAM R/W pin.
- Standby Current
Standby 120 uA
Deep power-down standby (10) uA
- Access Time
Access Time
CE1 Access Time
OE Access Time
Page Access Time
65ns
65ns
25ns
20NS
GENERAL DISCRIPTION
The EM7323SU16H is a 32M-bit StRAM organized as 2M
words by 16 bits. It provides high density, high speed and
low power. The device operates single power supply. The
device also features SRAM-like W/R timing whereby the
device is controlled by CE1, OE and WE on asynchro-
nous. The device has the page access operation. Page
size is 8 words. The device also supports deep power-
down mode, realizing low-power standby.
PAD DESCRIPTION
SYMBOL
A0~A20
A0~A2
CE1
CE2
WE
OE
LB
UB
DQ0~DQ15
V
DD
V
SS
V
DDQ
V
SSQ
NC
Address input
Page Address input
DESCRIPTION
Chip Enable Input1, Low : Enable
Chip Enable Input2, High:Enable, Low:Enter Power Down mode
Write Enable input, Low :Enable
Output Enable input, Low :Enable
Lower byte write control
Upper byte write control
Data inputs/outputs
Device Power supply
V
SS
must be connected ground
I/O Power supply
V
SS
must be connected ground
Not Connection
2
Rev. 0.0
Preliminary
EM7323SU16H
2Mx16 Async. / Page StRAM
FUNCTION BLOCK DIAGRAM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Sense AMP
DATA OUTPUT
BUFFER
DATA INPUT
BUFFER
COLUMN ADDRESS
DECODER
COLUMN ADDRESS
BUFFER
REFRESH
CONTROL
REFRESH
ADDRESS
COUNTER
A0 A1 A2 A3 A4 A5 A6 A7
CONTROL SIGNAL
GENERATOR
CE
WE
OE
UB
LB
CE1
CE2
CE
3
DATA OUTPUT
BUFFER
DATA INPUT
BUFFER
CE
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
ROW ADDRESS DECODER
ROW ADDRESS BUFFER
V
DD
GND
MEMORY CELL ARRAY
Rev. 0.0
Preliminary
EM7323SU16H
2Mx16 Async. / Page StRAM
OPERATION MODE
CE1 CE2
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
L
OE
L
L
L
X
X
X
H
X
X
WE
H
H
H
L
L
L
H
X
X
LB
L
L
H
L
L
H
X
X
X
UB
L
H
L
L
H
L
X
X
X
Add DQ
0
to DQ
7
DQ
8
to DQ
15
X
X
X
X
X
X
X
X
X
Data Out
Data Out
High-Z
Data In
Data In
Invalid
High-Z
High-Z
High-Z
Data Out
High-Z
Data Out
Data In
Invalid
Data In
High-Z
High-Z
High-Z
Mode
Read(Word)
Read(Lower Byte)
Read(Upper Byte)
Write(Word)
Write(Lower Byte)
Write(Upper Byte)
Outputs Disabled
Standby
Deep Power-down
Standby
Power
IDD0
IDD0
IDD0
IDD0
IDD0
IDD0
IDD0
IDDS
IDDSD
Note: X means don’t care. (Must be low or high state)
ABSOLUTE MAXIMUM RATINGS (SEE NOTE1)
SYMBOL
VDD
VIN
VOUT
Topr.
Tstrg.
PD
IOUT
RATING
Device Power Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Stroage Temperature
Power Dissipation
Short Circuit Output Current
VALUE
-1.0 to 3.6
-1.0 to 3.6
-1.0 to 3.6
-25 to 85
-55 to 150
0.6
50
UNIT
V
V
V
℃
℃
W
mA
DC RECOMMENDED OPERATING CONDITIONS(Ta = -25℃ to 85
℃)
SYMBOL
VDD
VIH
VIL
PARAMETER
Device Power Supply Voltage
Input High Voltage
Input Low Voltage
MIN
2.6
0.8*VDD
-0.3
TYP
2.75
-
-
Max
3.3
VDD + 0.3
0.15*VDD
V
Unit
VIH(Max) VDD+1.0V with 10ns pulse width
VIL(Min)-1.0V with 10ns pulse width
4
Rev. 0.0
Preliminary
EM7323SU16H
2Mx16 Async. / Page StRAM
DC CHARACTERISTICS(Ta = -25℃ to 85
℃,
VDD=2.6 to 3.3V)
(SEE NOTE 3 to 4)
Parameter
Input leakage current
Output leakage current
Operating current
Page Access Operating
current
Output high voltage
Output low voltage
Standby Current (CMOS)
Deep Power-down
Standby Curret
Symbol
I
LI
I
LO
I
DDO1
I
DDO2
V
OH
V
OL
I
DDS
V
DDSD
(*1, *2)
V
IN
=0 to V
DD
Test Conditions
Min
-1
-1
-
-
0.8*V
DD
Typ
-
-
-
-
-
-
-
-
Max
1
1
25
15
-
0.15*V
CCQ
Unit
uA
uA
mA
mA
V
V
uA
uA
Output disable, VOUT= 0V to VDD
tRC= Min, CE1=V
IL
, CE2=V
IH ,
I
OUT
=0mA
tPC = Min, CE1=V
IL
, CE2=V
IH ,
I
OUT
=0mA,
Page add. cycling.
I
OH
= -0.5mA
I
OL
= 1.0mA, V
CC=
V
CCmin
CE1>V
DD
-0.2V, CE2=V
DD
-0.2V
CE2 = 0.2V
-
-
-
120
10
Note
*1. Max VIL of signals(i.e. A0~A20, DQ1~DQ16, CE1#, CE2, WE#, OE#, LB#, UB#) can be 0.2V to 0.616V.
*2. For deep power-down, CE2<=0.2V is essential. If max VIL of CE2 is from 0.2V to 0.616V, the (10)uA deep-power
current will not be guaranteed, and the deep-power current might go high as (15)uA.
CAPACITANCE
(f =1MHz, T
A
=25
o
C)
Item
Input capacitance
Ouput capacitance
Symbol
C
IN
C
OUT
Test Condition
V
IN
=VSS
V
OUT
=VSS
Min
-
-
Max
10
10
Unit
pF
pF
Note : This parameter is sampled periodically and is not 100% tested
5
Rev. 0.0
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