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5V41236NLG8

Description
VFQFPN-20, Reel
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size474KB,14 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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5V41236NLG8 Overview

VFQFPN-20, Reel

5V41236NLG8 Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeVFQFPN
package instructionVFQFPN-20
Contacts20
Manufacturer packaging codeNLG20P1
Reach Compliance Codecompli
ECCN codeEAR99
JESD-30 codeS-XQCC-N20
JESD-609 codee3
length4 mm
Humidity sensitivity level1
Number of terminals20
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency200 MHz
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Master clock/crystal nominal frequency25 MHz
Maximum seat height1 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width4 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, PROCESSOR SPECIFIC
DATASHEET
4 OUTPUT PCIE GEN1/2/3 SYNTHESIZER
Recommended Applications
Four output synthesizer for PCIe Gen1/2/3
5V41236
Features/Benefits
20-TSSOP package; small board footprint
Spread spectrum capable; reduces EMI
Outputs can be terminated to LVDS; can drive a wider
variety of devices
General Description
The 5V41236 is a PCIe Gen1/2/3 compliant spread
spectrum capable clock generator. The device has 4
differential HCSL outputs and can be used in
communication or embedded systems to substantially
reduce electro-magnetic interference (EMI). The spread
amount and output frequency are selectable via select pins.
Power-down pin; greater system power management
OE control pin; greater system power management
Spread% and frequency pin selection; no software
required to configure device
Industrial temperature range available; supports
demanding embedded applications
Output Features
Four 0.7V current mode differential HCSL output pairs
Key Specifications
Cycle-to-cycle jitter < 100ps
Output-to-output skew < 50ps
PCIe Gen2 phase jitter < 3.0ps RMS
PCIe Gen3 phase jitter < 1.0ps RMS
Block Diagram
VDD
2
PD
OE
SEL[2:0]
3
Spread
Spectrum/
Output
clock
selection
Spread
Spectrum
Circuitry
CLKOUTA
25 MHz
crystal or
clock
X1
Clock
Oscillator
X2
CLKOUTA
CLKOUTB
PLL Clock
Synthesis
CLKOUTB
CLKOUTC
CLKOUTC
CLKOUTD
CLKOUTD
2
GND
Rr(IREF)
Optional tuning crystal
capacitors
IDT®
4 OUTPUT PCIE GEN1/2/3 SYNTHESIZER
1
5V41236
SEPTEMBER 18, 2019

5V41236NLG8 Related Products

5V41236NLG8 5V41236PGG 5V41236NLGI8 5V41236PGG8 5V41236PGGI8
Description VFQFPN-20, Reel TSSOP-20, Tube VFQFPN-20, Reel TSSOP-20, Reel TSSOP-20, Reel
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code VFQFPN TSSOP VFQFPN TSSOP TSSOP
package instruction VFQFPN-20 TSSOP, HVQCCN, TSSOP, TSSOP,
Contacts 20 20 20 20 20
Manufacturer packaging code NLG20P1 PGG20 NLG20P1 PGG20 PGG20
Reach Compliance Code compli compliant compli compli compli
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
JESD-30 code S-XQCC-N20 R-PDSO-G20 - R-PDSO-G20 R-PDSO-G20
JESD-609 code e3 e3 - e3 e3
length 4 mm 6.5 mm - 6.5 mm 6.5 mm
Humidity sensitivity level 1 1 - 1 1
Number of terminals 20 20 - 20 20
Maximum operating temperature 70 °C 70 °C - 70 °C 85 °C
Maximum output clock frequency 200 MHz 200 MHz - 200 MHz 200 MHz
Package body material UNSPECIFIED PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code HVQCCN TSSOP - TSSOP TSSOP
Package shape SQUARE RECTANGULAR - RECTANGULAR RECTANGULAR
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 260 260 - 260 260
Master clock/crystal nominal frequency 25 MHz 25 MHz - 25 MHz 25 MHz
Maximum seat height 1 mm 1.2 mm - 1.2 mm 1.2 mm
Maximum supply voltage 3.465 V 3.465 V - 3.465 V 3.465 V
Minimum supply voltage 3.135 V 3.135 V - 3.135 V 3.135 V
Nominal supply voltage 3.3 V 3.3 V - 3.3 V 3.3 V
surface mount YES YES - YES YES
technology CMOS CMOS - CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL - COMMERCIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn) - Matte Tin (Sn) Matte Tin (Sn)
Terminal form NO LEAD GULL WING - GULL WING GULL WING
Terminal pitch 0.5 mm 0.65 mm - 0.65 mm 0.65 mm
Terminal location QUAD DUAL - DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
width 4 mm 4.4 mm - 4.4 mm 4.4 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC - CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC

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