SAM V71
Atmel | SMART ARM-based Flash MCU
PRELIMINARY DATASHEET
Description
The Atmel
®
| SMART SAM V71 devices are members of a family of Automotive
Flash microcontrollers based on the high-performance 32-bit ARM
®
Cortex
®
-M7
processor with Floating Point Unit (FPU). These devices operate at up to
300 MHz and feature up to 2048 Kbytes of Flash and up to 384 Kbytes of multi-
port SRAM. The on-chip SRAM can be configured as Tightly Coupled Memory
(TCM) or system memory. A multi-port access to the SRAM guarantees a
minimum access latency. The peripheral set includes an Ethernet MAC
supporting IEEE1588, 802.1Qbb, 802.3az, 802.1AS and 802.1Qav, a high-speed
USB Device port and a high-speed USB Host port sharing an embedded
transceiver, a MediaLB device interface, an Image Sensor Interface, a high-speed
MCI for SDIO/SD/MMC, an External Bus Interface featuring an SDRAM
Controller, and a Static Memory Controller providing connection to SRAM,
PSRAM, NOR Flash, LCD module and NAND Flash. Additional peripherals
include three USARTs, five UARTs, three TWIs, one Quad I/O SPI, two SPIs, one
SSC, as well as two PWM timers, four three-channel general-purpose 16-bit
timers (with stepper motor and quadrature decoder logic support), two CAN-FDs,
one RTC, two 12-bit ADCs, one 12-bit DAC and one analog comparator.
The SAM V71 devices have three software-selectable low-power modes: Sleep,
Wait and Backup. In Sleep mode, the processor is stopped while all other
functions can be kept running. In Wait mode, all clocks and functions are stopped
but some peripherals can be configured to wake up the system based on
predefined conditions. This feature, called SleepWalking™, performs a partial
asynchronous wake-up, thus allowing the processor to wake up only when
needed. In Backup mode, the device is able to meet the most stringent Key-Off
requirements while retaining 1Kbyte of SRAM and wake-up on CAN.
To optimize power consumption, the clock system has been designed to support
different clock frequencies for selected peripherals. Moreover, the processor and
bus clock frequency can be modified without affecting processing on, for example,
the USB, U(S)ART, ADC and Timer Counter.
The Event System allows peripherals to receive, react to and send events in
Active and Sleep modes without processor intervention.
The SAM V71 devices are high-performance Automotive microcontrollers,
targeting In-Vehicle Infotainment connectivity applications, combining a rich set of
interfaces including Ethernet-AVB and advanced DSP capabilities particularly
useful for audio processing.
SAM V71 devices operate from 1.62V to 3.6V and are available in the following
packages:
̶
144-pin LQFP
̶
144-ball LFBGA
Atmel-44003A-ATARM-SAM V71-Preliminary Datasheet_05-Jan-15
̶
̶
̶
̶
̶
100-pin LQFP
100-ball TFBGA
64-pin LQFP
64-ball TFBGA
(1)
64-pin QFN (wettable flanks)
The SAM V71 devices are pin-to-pin compatible with the SAM4E (100-pin and 144-pin versions), except for USB
signals.
An Atmel application note is available to ease migration from SAM4E devices to SAM V71 devices.
Note:
1.
Contact your local Atmel sales representative for availability.
Features
Core
̶
ARM Cortex-M7 running at up to 300 MHz
(1)
̶
16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
̶
Simple- and double-precision HW Floating Point Unit (FPU)
̶
Memory Protection Unit (MPU) with 16 zones
̶
DSP Instructions, Thumb
®
-2 Instruction Set
̶
Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
Memories
̶
Up to 2048 Kbytes embedded Flash with unique identifier
̶
Embedded Flash Controller
̶
Up to 384 Kbytes embedded Multi-port SRAM
̶
Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x
128 Kbytes)
̶
16 Kbytes ROM with embedded Boot Loader routines (UART0, USB) and IAP routines
̶
16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, NOR and NAND Flash
̶
16-bit SDRAM Controller
System
̶
Embedded voltage regulator for single-supply operation
̶
Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
̶
Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz
needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
̶
RTC with Gregorian and Persian calendar mode, waveform generation in low-power modes
̶
RTC clock calibration circuitry for 32.768 kHz crystal frequency compensation
̶
High-precision 4/8/12 MHz factory-trimmed internal RC oscillator with 4 MHz default frequency for device
startup. In-application trimming access for frequency adjustment
̶
Slow Clock Internal RC oscillator as permanent low-power mode device clock
̶
One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
̶
Temperature Sensor
̶
One dual-port 24-channel Central DMA Controller
Low-Power Modes
̶
Sleep and Backup modes, with power consumption down to 3 µA in Backup mode
̶
Ultra-low-power RTC and RTT
̶
1 Kbyte of backup RAM with dedicated regulator
2
SAM V71 [PRELIMINARY DATASHEET]
Atmel-44003A-ATARM-SAM V71-Preliminary Datasheet_05-Jan-15
Peripherals
̶
One Ethernet MAC (GMAC) 10/100 Mbps in MII mode and RMII with dedicated DMA. IEEE1588 PTP frames
and 802.3az Energy-efficiency support. Ethernet AVB support with IEEE802.1AS Time-stamping and
IEEE802.1Qav credit-based traffic-shaping hardware support.
̶
USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-kbyte FIFO, up to 10 bidirectional endpoints,
dedicated DMA
̶
12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
̶
Two Master CAN-FD Controllers with SRAM-based mailboxes, time- and event-triggered transmission
̶
MediaLB
®
device with 3-wire mode, up to 1024 x Fs speed, supporting MOST25 and MOST50 networks
̶
Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA
®
, RS-485, SPI, Manchester and Modem
modes; USART1 supports LON mode.
̶
Five 2-wire UARTs with SleepWalking support
̶
Three Two-Wire Interfaces (TWIHS) (I
2
C-compatible) with SleepWalking support
̶
Quad I/O Serial Peripheral Interface (QSPI) with eXecute-In-Place feature to a dedicated AHB memory zone
̶
Two Serial Peripheral Interfaces (SPI)
̶
One Serial Synchronous Controller (SSC) with I2S and TDM support
̶
One High-speed Multimedia Card Interface (SDIO/SD Card/MMC)
̶
Four Three-Channel 16-bit Timer/Counters with Capture, Waveform, Compare and PWM modes, constant on
time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
̶
Two 4-channel 16-bit PWM with complementary output, 8 fault inputs and 4 break inputs per PWM, constant on
time and 12-bit Dead Time Generator Counter for motor control
̶
32-bit Real-time Timer (RTT)
̶
Real-time Counter (RTC) with calendar and alarm features
̶
Two ADCs, each supporting up to 12 channels with differential input mode and programmable gain stage,
allowing dual sampling and hold at up to 2 Msps. Gain and Offset error Autotest feature.
̶
One 2-channel 12-bit 2 Msps DAC
̶
One Analog Comparator with flexible input selection, selectable input hysteresis
Cryptography
̶
True Random Number Generator (TRNG)
̶
AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications
̶
Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
I/O
̶
Up to 115 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and
On-die Series Resistor Termination
̶
Five 32-bit Parallel Input/Output Controllers
Voltage
̶
Single supply voltage from 1.62V to 3.6V
Automotive
̶
Qualification AEC-Q100 grade 2 ([-40°C : +105°C] ambient temperature)
Packages
̶
LQ144, 144-lead LQFP, 20 x 20 mm, pitch 0.5 mm
̶
LFBGA144, 144-ball LFBGA, 10 x 10 mm, pitch 0.8 mm
̶
LQ100, 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm
̶
TFBGA100, 100-ball TFBGA, 9 x 9 mm, pitch 0.8 mm
̶
LQ64, 64-lead LQFP, 10 x 10 mm, pitch 0.5 mm
̶
TFBGA64, 64-ball TFBGA, TBD
(2)
̶
QFN64, 64-pad QFN 9x9 mm, pitch 0.5 mm, with wettable flanks
1.
2.
300 MHz is at [-40°C : +105°C], 1.2V or with the internal regulator.
Contact your local Atmel sales representative for availability.
Notes:
SAM V71 [PRELIMINARY DATASHEET]
Atmel-44003A-ATARM-SAM V71-Preliminary Datasheet_05-Jan-15
3
1.
Configuration Summary
Configuration Summary
SAMV71Q21
SAMV71Q20
SAMV71Q19
SAMV71N21
SAMV71N20
SAMV71N19
SAMV71J21
SAMV71J20
SAMV71J19
The SAM V71 devices differ in memory size, package and features.
Table 1-1
summarizes the different configurations.
Table 1-1.
Feature
Flash
(Kbytes)
Multi-port SRAM
(Kbytes)
Cache(I/D)
(Kbytes)
2048
384
1024
512
256
2048
384
1024
512
256
2048
384
1024
512
256
16/16
LQ144
LFBGA144
114
16-bit data, 4 chip selects, 24-bit address
Yes
LQ100
TFBGA100
75
–
–
Yes
24
24 ch.
(2)
2 ch.
10 ch.
(2)
2 ch.
12
12
3/5
(1)
Yes
Yes
Yes
3
(1)
3
1 port
4 bits
3
3/5
(1)
Yes
Yes
No
3
(1)
3
1 port
4 bits
1
2/3
(1)
Yes
Yes
No
0
(1)
2
–
5 ch.
(2)
1 ch.
LQ64
TFBGA64
(3)
QFN64
44
–
–
Package
Number of PIOs
External Bus Interface
SDRAM Interface
Media LB Interface
Central DMA
12-bit ADC
12-bit DAC
Timer Counter
Channels
Timer Counter
Channels I/O
USART/UART
QSPI
SPI0
SPI1
USART SPI
TWI
HSMCI
SAM V71 [PRELIMINARY DATASHEET]
4
Atmel-44003A-ATARM-SAM V71-Preliminary Datasheet_05-Jan-15
Table 1-1.
Configuration Summary (Continued)
SAMV71Q21
SAMV71Q20
SAMV71Q19
SAMV71N21
SAMV71N20
SAMV71N19
SAMV71J21
SAMV71J20
SAMV71J19
Feature
CAN
GMAC
ISI
SSC
USB
Analog Comparator
Embedded Trace
Macrocel (ETM)
Notes:
2 ports
MII, RMII
12-bit
2 ports
MII, RMII
12-bit
Yes
1 port
RMII
8-bit
High-speed
Yes
Yes
High-speed
Yes
Yes
Full-speed
Yes
Yes
1. LON support on USART1 only.
2. One channel is reserved for internal temperature sensor.
3. Contact your local Atmel sales representative for availability.
SAM V71 [PRELIMINARY DATASHEET]
5
Atmel-44003A-ATARM-SAM V71-Preliminary Datasheet_05-Jan-15
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