EN29SL400B-90BI datasheet, PDF

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EN29SL400B-90BI: DescriptionFlash, 256KX16, 90ns, PBGA48, TFBGA-48; Categorystorage storage; File Size309KB，40 Pages; ManufacturerESMT; Websitehttp://www.esmt.com.tw/; Elite Semiconductor Memory Technology Inc. (ESMT) is a professional IC design company founded by Dr. Hu Zhao in June 1998. Its headquarters is located in Hsinchu Science Park, Taiwan. The company's main business includes research, development, manufacturing, sales and related technical services of IC products. It was listed on the Taiwan Stock Exchange in March 2002.

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EN29SL400B-90BI Overview

Flash, 256KX16, 90ns, PBGA48, TFBGA-48

EN29SL400B-90BI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ESMT
package instruction	LFBGA, BGA48,6X8,32
Reach Compliance Code	unknow
Maximum access time	90 ns
Spare memory width	8
startup block	BOTTOM
command user interface	YES
Data polling	YES
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PBGA-B48
length	8 mm
memory density	4194304 bi
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	1,2,1,7
Number of terminals	48
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX16
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Encapsulate equivalent code	BGA48,6X8,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
power supply	1.8/2 V
Programming voltage	1.8 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.3 mm
Department size	16K,8K,32K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.025 mA
Maximum supply voltage (Vsup)	2.2 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
switch bit	YES
type	NOR TYPE
width	6 mm

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EN29SL400

4 Megabit (512K x 8-bit / 256K x 16-bit) Flash Memory

Boot Sector Flash Memory, CMOS 1.8 Volt-only

FEATURES

•

Single power supply operation

- Full voltage range:1.65-2.2 volt for read and

write operations.

- Ideal for battery-powered applications.

•

High performance

- Access times as fast as 70 ns

•

Low power consumption (typical values at 5

MHz)

- 10 mA typical active read current

- 15 mA typical program/erase current

- 0.2

μA

typical standby current

•

Flexible Sector Architecture:

- One 16 K-byte, two 8 K-byte, one 32 K-byte,

and seven 64 K-byte sectors (byte mode)

- One 8 K-word, two 4 K-word, one 16 K-word

and seven 32 K-word sectors (word mode)

•

Sector protection:

- Hardware locking of sectors to prevent

program or erase operations within individual

sectors

- Additionally, temporary Sector Unprotect

allows code changes in previously locked

sectors.

•

High performance program/erase speed

- Byte/Word program time: 5µs/7µs typical

- Sector erase time: 500ms typical

•

JEDEC Standard Embedded Erase and

Program Algorithms

•

JEDEC standard DATA# polling and toggle

bits feature

•

Single Sector and Chip Erase

•

Sector Unprotect Mode

•

Erase Suspend / Resume modes:

Read or program another Sector during

Erase Suspend Mode

•

Triple-metal double-poly triple-well COMS Flash

Technology

•

Low Vcc write inhibit < 1.2V

•

Minimum 100K endurance cycle

•

Package Options

- 48-pin TSOP (Type 1)

- 48-ball 6mm x 8mm TFBGA

•

Commercial and Industrial Temperature

Range

GENERAL DESCRIPTION

The EN29SL400 is an 4-Megabit, electrically erasable, read/write non-volatile flash memory,

organized as 524,288 bytes or 262144 words. Any byte can be programmed typically in 5µs. The

EN29SL400 features 1.8V voltage read and write operation, with access time as fast as 70ns to

eliminate the need for WAIT statements in high-performance microprocessor systems.

The EN29SL400 has separate Output Enable (OE#), Chip Enable (CE#), and Write Enable (WE#)

controls, which eliminate bus contention issues. This device is designed to allow either single Sector

or full chip erase operation, where each sector can be individually protected against program/erase

operations or temporarily unprotected to erase or program. The device can sustain a minimum of

100K program/erase cycles on each sector.

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. C, Issue Date: 2008/07/07

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