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K6R4016C1A-TI15

Description
Standard SRAM, 256KX16, 15ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44
Categorystorage    storage   
File Size197KB,9 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

K6R4016C1A-TI15 Overview

Standard SRAM, 256KX16, 15ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

K6R4016C1A-TI15 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeTSOP2
package instructionTSOP2, TSOP44,.46,32
Contacts44
Reach Compliance Codeunknow
ECCN code3A991.B.2.A
Maximum access time15 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G44
JESD-609 codee0
length18.41 mm
memory density4194304 bi
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals44
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP44,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.01 A
Minimum standby current4.5 V
Maximum slew rate0.21 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
PRELIMINARY
K6R4016C1A-C, K6R4016C1A-E, K6R4016C1A-I
CMOS SRAM
Document Title
256Kx16 Bit High Speed Static RAM(5V Operating), Revolutionary Pin out.
Operated at Commercial, Extended and Industrial Temperature Ranges.
Revision History
Rev No.
Rev. 0.0
Rev. 0.5
History
Initial release with Design Target.
Release to Preliminary Data Sheet.
0.1. Replace Design Target to Preliminary.
0.2. Delete 12ns part but add 17ns part.
0.3. Relax D.C and A.C parameters and insert new parameter(Icc
1
)
with the test condition.
0.3.1. Insert Icc
1
parameter with the test condition as address is
increased with binary count.
0.3.2. Relax D.C and A.C parameters.
Previous spec.
Relaxed spec.
Items
(15/ - /20ns part)
(15/17/20ns part)
Icc
250/ - /240mA
280/275/270mA
t
CW
10/ - /12ns
12/13/14ns
t
AW
10/ - /12ns
12/13/14ns
t
WP
(OE=H)
10/ - /12ns
12/13/14ns
t
WP1
(OE=L)
12/ - /14ns
15/17/20ns
t
DW
7/ - /9ns
8/ 9/10ns
Release to Final Data Sheet.
1.1. Delete Preliminary.
1.2. Delete Icc1 parameter with the test condition.
1.3. Update D.C parameters.
Previous spec.
Updated spec.
Items
(15/17/20ns part)
(15/17/20ns part)
Icc
280/275/270mA
210/205/200mA
1.4. Add the test condition for V
OH1
with Vcc=5V±5% at 25°C.
1.5. Add timing diagram to define t
WP1
as
″(Timing
Wave Form of
Write Cycle(OE=Low fixed)″.
2.1 Add extended and industrial temperature range parts.
Add 44-TSOP2 Package.
Draft Data
Jun. 14th, 1996
Sep. 16th, 1996
Remark
Design Target
Preliminary
Rev. 1.0
Jun. 5th, 1997
Final
Rev.2.0
Rev.2.1
Feb. 25th, 1998
Dec. 14th, 1998
Final
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 2.1
December 1998
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