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K6F1616R6A-EF85

Description
Standard SRAM, 1MX16, 85ns, CMOS, PBGA48, 7.50 X 9.50 MM, 0.75 MM PITCH, TBGA-48
Categorystorage    storage   
File Size158KB,9 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
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K6F1616R6A-EF85 Overview

Standard SRAM, 1MX16, 85ns, CMOS, PBGA48, 7.50 X 9.50 MM, 0.75 MM PITCH, TBGA-48

K6F1616R6A-EF85 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeBGA
package instructionVFBGA, BGA48,6X8,30
Contacts48
Reach Compliance Codecompli
ECCN code3A991.B.2.A
Maximum access time85 ns
I/O typeCOMMON
JESD-30 codeR-PBGA-B48
JESD-609 codee0
length9.5 mm
memory density16777216 bi
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals48
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize1MX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeVFBGA
Encapsulate equivalent codeBGA48,6X8,30
Package shapeRECTANGULAR
Package formGRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply1.8/2 V
Certification statusNot Qualified
Maximum seat height1 mm
Maximum standby current0.000008 A
Minimum standby current1 V
Maximum slew rate0.02 mA
Maximum supply voltage (Vsup)2.2 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.5 mm

K6F1616R6A-EF85 Preview

Preliminary
K6F1616R6A Family
Document Title
1M x16 bit Super Low Power and Low Voltage Full CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0
Initial draft
Draft Date
September 12, 2001
Remark
Preliminary
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 0.0
September 2001
Preliminary
K6F1616R6A Family
FEATURES
Process Technology: Full CMOS
Organization: 1M x16
Power Supply Voltage: 1.65~2.2V
Low Data Retention Voltage: 1.0V(Min)
Three State Outputs
Package Type: 48-TBGA-7.50x9.50
CMOS SRAM
GENERAL DESCRIPTION
The K6F1616R6A families are fabricated by SAMSUNG′s
advanced full CMOS process technology. The families support
industrial operating temperature ranges and have chip scale
package for user flexibility of system design. The families also
support low data retention voltage for battery back-up operation
with low data retention current.
1M x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM
PRODUCT FAMILY
Power Dissipation
Product Family
K6F1616R6A-F
Operating Temperature
Industrial(-40~85°C)
Vcc Range
1.65~2.2V
Speed
70
1)
/85ns
Standby
(I
SB1
, Typ.)
1µA
2)
Operating
(I
CC1
, Max)
3mA
PKG Type
48-TBGA-7.50x9.50
1. The parameter is measured with 30pF test load.
2. Typical value are measured at V
CC
=2.0V, T
A
=25°C and not 100% tested.
PIN DESCRIPTION
1
2
3
4
5
6
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
A
LB
OE
A0
A1
A2
CS2
Vcc
Vss
B
I/O9
UB
A3
A4
CS1
I/O1
Row
Addresses
C
I/O10
I/O11
A5
A6
I/O2
I/O3
Row
select
Memory
Cell
Array
D
Vss
I/O12
A17
A7
I/O4
Vcc
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
E
Vcc
I/O13
Vss
A16
I/O5
Vss
I/O
1
~I/O
8
I/O
9
~I/O
16
F
I/O15
I/O14
A14
A15
I/O6
I/O7
G
I/O16
A19
A12
A13
WE
I/O8
Column Addresses
H
A18
A8
A9
A10
A11
DNU
CS1
48-TBGA: Top View (Ball Down)
CS2
OE
WE
Control Logic
Name
CS
1
, CS
2
OE
WE
A
0
~A
19
Function
Chip Select Inputs
Output Enable Input
Write Enable Input
Address Inputs
Name
Vcc
Vss
UB
LB
DNU
Function
Power
Ground
Upper Byte(I/O
9
~
16
)
Lower Byte(I/O
1
~
8
)
Do Not Use
UB
LB
I/O
1
~I/O
16
Data Inputs/Outputs
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 0.0
September 2001
Preliminary
K6F1616R6A Family
PRODUCT LIST
Industrial Temperature Products(-40~85°C)
Part Name
K6F1616R6A-EF70
K6F1616R6A-EF85
Function
CMOS SRAM
48-TBGA, 70ns, 1.8/2.0V
48-TBGA, 85ns, 1.8/2.0V
FUNCTIONAL DESCRIPTION
CS
1
H
X
1)
X
1)
L
L
L
L
L
L
L
L
CS
2
X
1)
L
X
1)
H
H
H
H
H
H
H
H
OE
X
1)
X
1)
X
1)
H
H
L
L
L
X
1)
X
1)
X
1)
WE
X
1)
X
1)
X
1)
H
H
H
H
H
L
L
L
LB
X
1)
X
1)
H
L
X
1)
L
H
L
L
H
L
UB
X
1)
X
1)
H
X
1)
L
H
L
L
H
L
L
I/O
1~8
High-Z
High-Z
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
I/O
9~16
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Dout
Dout
High-Z
Din
Din
Mode
Deselected
Deselected
Deselected
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
Power
Standby
Standby
Standby
Active
Active
Active
Active
Active
Active
Active
Active
1. X means don′t care. (Must be low or high state)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
T
A
Ratings
-0.2 to V
CC
+0.3V(Max. 2.5V)
-0.2 to 2.5
1.0
-65 to 150
-40 to 85
Unit
V
V
W
°C
°C
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 0.0
September 2001
Preliminary
K6F1616R6A Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Min
1.65
0
1.4
-0.2
3)
Typ
1.8/2.0
0
-
-
CMOS SRAM
Max
2.2
0
Vcc+0.2
2)
0.4
Unit
V
V
V
V
Note:
1. T
A
=-40 to 85°C, otherwise specified
2. Overshoot: V
CC
+1.0V in case of pulse width
≤20ns.
3. Undershoot: -1.0V in case of pulse width
≤20ns.
4. Overshoot and Undershoot are sampled, not 100% tested.
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Symbol
I
LI
I
LO
V
IN
=Vss to Vcc
CS
1
=V
IH
or CS
2
=V
IL
or OE=V
IH
or WE=V
IL
or
LB=UB=V
IH
, V
IO
=Vss to Vcc
Cycle time=1µs, 100%duty, I
IO
=0mA, CS
1
≤0.2V,
LB≤0.2V or/and UB≤0.2V, CS
2
≥Vcc-0.2V,
V
IN
≤0.2V
or
V
IN
≥V
CC
-0.2V
Cycle time=Min, I
IO
=0mA, 100% duty, CS
1
=V
IL
,
CS
2
=V
IH
, LB=V
IL
or/and UB=V
IL
, V
IN
=V
IL
or V
IH
I
OL
= 0.1mA
I
OH
= -0.1mA
Other input =0~Vcc
1) CS
1
≥Vcc-0.2V,
CS
2
≥Vcc-0.2V(CS
1
controlled) or
2) 0V≤CS
2
≤0.2V(CS
2
controlled)
85ns
70ns
Test Conditions
Min
-1
-1
Typ
1)
-
-
Max
1
1
Unit
µA
µA
I
CC1
Average operating current
I
CC2
Output low voltage
Output high voltage
Standby Current(CMOS)
V
OL
V
OH
I
SB1
-
-
-
-
1.4
-
-
-
-
-
-
1
3
20
mA
mA
25
0.2
-
15
V
V
µA
1. Typical value are measured at V
CC
=2.0V, T
A
=25°C and not 100% tested.
4
Revision 0.0
September 2001
Preliminary
K6F1616R6A Family
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Input/Output Reference)
Input pulse level: 0.2 to Vcc-0.2V
Input rising and falling time: 5ns
Input and output reference voltage: 0.9V
Output load(see right): C
L
=100pF+1TTL
C
L
=30pF+1TTL
CMOS SRAM
V
TM
3)
R
1
2)
C
L
1)
R
2
2)
1. Including scope and jig capacitance
2. R
1
=3070Ω
,
R
2
=3150Ω
3. V
TM
=1.8V
AC CHARACTERISTICS
(Vcc=1.65~2.2V, T
A
=-40 to 85°C)
Speed Bins
Parameter List
Symbol
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
LB, UB valid to data output
Read
Chip select to low-Z output
Output enable to low-Z output
LB, UB enable to low-Z output
Output hold from address change
Chip disable to high-Z output
OE disable to high-Z output
UB, LB disable to high-Z output
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
LB, UB valid to end of write
t
RC
t
AA
t
CO1
, t
CO2
t
OE
t
BA
t
LZ1
, t
LZ2
t
OLZ
t
BLZ
t
OH
t
HZ1
, t
HZ2
t
OHZ
t
BHZ
t
WC
t
CW1
, t
CW2
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
t
BW
70
-
-
-
-
10
5
10
10
0
0
0
70
60
0
60
50
0
0
30
0
5
60
70ns
Max
-
70
70
35
70
-
-
-
-
25
25
25
-
-
-
-
-
-
20
-
-
-
-
Min
85
-
-
-
-
10
5
10
10
0
0
0
85
70
0
70
60
0
0
35
0
5
70
85ns
Max
-
85
85
40
85
-
-
-
-
25
25
25
-
-
-
-
-
-
25
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Symbol
V
DR
I
DR
t
SDR
t
RDR
Test Condition
CS
1
≥Vcc-0.2V
1)
Vcc=1.2V, CS
1
≥Vcc-0.2V
1)
, V
IN
≥0V
See data retention waveform
Min
1.0
-
0
tRC
Typ
2)
-
0.5
-
-
Max
2.2
8
-
-
Unit
V
µA
ns
1. 1) CS
1
≥Vcc-0.2V,
CS
2
≥Vcc-0.2V(CS
1
controlled) or
2) 0≤CS
2
≤0.2V(CS
2
controlled)
2. Typical values are measured at T
A
=25°C and not 100% tested.
5
Revision 0.0
September 2001

K6F1616R6A-EF85 Related Products

K6F1616R6A-EF85 K6F1616R6A-EF70 K6F1616R6A-EF700
Description Standard SRAM, 1MX16, 85ns, CMOS, PBGA48, 7.50 X 9.50 MM, 0.75 MM PITCH, TBGA-48 Standard SRAM, 1MX16, 70ns, CMOS, PBGA48, 7.50 X 9.50 MM, 0.75 MM PITCH, TBGA-48 Standard SRAM, 1MX16, 70ns, CMOS, PBGA48, 7.50 X 9.50 MM, 0.75 MM PITCH, TBGA-48
Maker SAMSUNG SAMSUNG SAMSUNG
Parts packaging code BGA BGA BGA
package instruction VFBGA, BGA48,6X8,30 VFBGA, BGA48,6X8,30 VFBGA,
Contacts 48 48 48
Reach Compliance Code compli compliant unknown
ECCN code 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 85 ns 70 ns 70 ns
JESD-30 code R-PBGA-B48 R-PBGA-B48 R-PBGA-B48
length 9.5 mm 9.5 mm 9.5 mm
memory density 16777216 bi 16777216 bit 16777216 bit
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 16 16 16
Number of functions 1 1 1
Number of terminals 48 48 48
word count 1048576 words 1048576 words 1048576 words
character code 1000000 1000000 1000000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C
organize 1MX16 1MX16 1MX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code VFBGA VFBGA VFBGA
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/Serial PARALLEL PARALLEL PARALLEL
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 1 mm 1 mm 1 mm
Maximum supply voltage (Vsup) 2.2 V 2.2 V 2.2 V
Minimum supply voltage (Vsup) 1.65 V 1.65 V 1.65 V
Nominal supply voltage (Vsup) 1.8 V 1.8 V 1.8 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form BALL BALL BALL
Terminal pitch 0.75 mm 0.75 mm 0.75 mm
Terminal location BOTTOM BOTTOM BOTTOM
width 7.5 mm 7.5 mm 7.5 mm
Is it Rohs certified? incompatible incompatible -
I/O type COMMON COMMON -
JESD-609 code e0 e0 -
Output characteristics 3-STATE 3-STATE -
Encapsulate equivalent code BGA48,6X8,30 BGA48,6X8,30 -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED -
power supply 1.8/2 V 1.8/2 V -
Maximum standby current 0.000008 A 0.000008 A -
Minimum standby current 1 V 1 V -
Maximum slew rate 0.02 mA 0.025 mA -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
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