Cal-Chip
Electronics, Incorporated
Multilayer Ceramic Chip Capacitors
Introduction
GMC S
ERIES
Multilayer Surface Mount Ceramic Capacitors are constructed by screen printing alternative layers of internal metallic
electrodes onto ceramic dielectric materials and firing into a concrete monolithic body, then completed by application of
metal end terminations which are fired to assure permanent bonding with the individual internal electrodes.
Multilayer ceramic capacitors have various features such as large capacitance values in small sizes and excellent high
frequency characteristics.
Moreover, chip capacitors can be used on surface mount assembly equipment. Our fully integrated manufacturing and
total quality control systems ensure unprecedented high standards of quality and reliability.
Chip Capacitor Selection
Selection of the most suitable capacitor for any application is based on the following:
Dielectric Type
The choice of dielectric is largely determined by the temperature stability required.
COG (NPO)
Capacitance change with temperature is 0-30ppm/°C which is less than -0.3%°C from -55°C to +125°C. Typical capacitance
change with life is less than -0.1% for NPOs, one-fifth that shown by most other dielectrics. NPO formulations show no aging
characteristics.
X7R/X5R
Its temperature variation of capacitance is within ±15% from -55°C to +125°C (-55°C to +85°C for X5R). The capacitance change is
non-linear.
Z5U
Despite their capacitance instability, Z5U formulations are very popular because of their small size, temperature range low
ESL, low ESR and excellent frequency response. These features are particularly important for decoupling application where
only a minimum capacitance value is required.
Y5V
Y5V formulations are for general purpose use in a limited temperature range. They have a wide temperature characteristic
of +22% - 82% capacitance change over the operating temperature range of -30°C to +85°C. Y5Vs high dielectric constant
allows the manufacture of very high capacitance values (up to 22MF) in small physical sizes.
Capacitance Value & Tolerance
Determined by circuit requirements. Note that chip prices decrease with lower capacitance value and looser tolerance.
Voltage
Determined by circuit requirements. Units are designed to exceed the withstanding voltage specification, i.e., the user need
not incorporate an additional safety margin.
Capacitor Size
Select the smallest unit permitted by the circuit constraints that provides the required capacitance and voltage rating.
All Cal-Chip capacitors conform to EIA specifications.
Capacitor Termination
Nickel barrier is standard and recommended for units exposed to repeated solder cycles, to minimize leaching of the ter-
mination.
1
Cal-Chip
Construction
Electronics, Incorporated
GMC S
ERIES
Multilayer Ceramic Chip Capacitors
Solder
plate; 100% matte SN;
typical thickness 0.003mm to 0.005mm
*(please see note)
Nickel Barrier Layer (50 Micro-inches Electroplated Nickel min.)
Inner
Electrodes
Example
GMC21
Size Code
CG
Dielectric
102
Capacitance (pF)
J
Capacitance
Tolerance
(EIA Code)
50
Voltage
N
Termination
T
Packaging
Code
M
CG (COG) (NPO)
X7R or X5R
Z5U
Y5V
Capacitance values are represented in 3 digits,
and expressed in pF. The first two digits are
significant, and the third is the number of zeros.
The letter “R” is used as a decimal point.
0R5
5R0
100
101
102
103
104
105
106
0.5pF
5pF
10pF
100pF
1000pF
.01mF
.1mF
1.0mF
10mF
B
C
D
F
G
J
K
M
Z
±0.1pf
for < 10pF
±0.25pF for < 10pF
±0.5pF
for < 10pF
±1%
±2%
±5%
±10%
±20%
-20%~+80%
6r3
10
16
25
50
100
200
6.3 DC
10 DC
16 DC
25 DC
50 DC
100 DC
200 DC
N
Nickel Barrier
T
Tape and Reel
*Note: Calchip has completed the Lead-Free transition. All parts shipped with or without the "custom designator" LF at the end
of the part number will be Lead-Free. Lead-Free material will still continue to have an LF at the end of the Lot Code and a green
RoHS symbol on the label. Please contact your sales associate if you require non-RoHS material.
2
京公网安备 11010802033920号
EEWORLD
