April 2008
rev 1.5
ASM161/ASM162
µP Supervisory Circuit
General Description
The ASM161 and ASM162 are cost effective, low power
supervisory circuits that monitor power supplies in
microprocessor, microcontroller and digital systems. If the
power supply drops below the reset threshold level, a
reset is asserted and remains asserted for atleast 800ms
after V
CC
has risen above the reset threshold. An
improved manual reset architecture gives the system
designer additional flexibility.
The debounced manual reset input is negative edge
triggered. The reset pulse period generated by a MR
transition is a minimum of 800 ms and a maximum of
2 sec duration. In addition, The MR input signal is
blocked for an additional 49µS minimum after the reset
pulse
ends.
During
the
MR
disable
period,
the
microcontroller is guaranteed a time period free of
additional manual reset signals. During this period DRAM
contents can be refreshed or other critical system tasks
undertaken.
operated
Low
power
consumption
3V
makes
the
ASM161/162 ideal for use in portable and battery
equipments.
With
supplies
power
consumption is 8µW typically and 30µW maximum. The
ASM161 has an open-drain, active-LOW RESET output
and requires an external pull-up resistor. The ASM162
has an active HIGH RESET output.
The ASM161/162 are offered in compact 4-pin SOT-143
packages. No external components are required to trim
threshold voltage for monitoring different supply voltages.
With six different factory set, reset, threshold ranges from
2.63V to 4.63V, the ASM161/162 are suitable for
monitoring 5V, 3.6V and 3.0V supplies. The ASM161/162
are available in temperature ranges 0°c to 70°c and -40°c
to +85°c.
Reset Threshold
Part Suffix
L
M
J
T
S
R
Voltage (V)
4.63
4.38
4.00
3.08
2.93
2.63
Key Features
• Edge triggered manual reset input
• single pulse output
• 49µS minimum MR disable period after reset
• CMOS/TTL logic or switch interface
• Debounced input
• Low supply current extends battery life
6µA / 15µA typ/max at 5.5V
4.5µA / 10µA typ/max at 3.6V
• Long reset period
• 0.8 sec minimum, 2 sec maximum
• Two reset polarity options
ASM161: Active LOW, open-drain
ASM162: Active HIGH
• Pinout matches the ASM811/812
• Small 4-Pin SOT-143 package
• Two temperature ranges: 0°c to 70°c and -40°c to +85°c
Applications
• PDAs
• Appliances
• Computers and embedded controllers
• Wireless communication systems
• Battery operated and intelligent instruments
• Automotive systems
• Safety systems
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200 Campbell, CA 95008
•
Tel: 408-879-9077
•
Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
April 2008
rev 1.5
Typical Operating Circuit
ASM161/ASM162
Block Diagram
Pin Configuration
RESET is open drain
µP Supervisory Circuit
Notice: The information in this document is subject to change without notice.
2 of 9
April 2008
rev 1.5
Pin Description
Pin #
ASM161
1
2
ASM162
1
-
Pin
Name
GND
RESET
Ground.
Function
ASM161/ASM162
Active-LOW, open-drain reset output. RESET remains LOW while V
CC
is
below the reset threshold and for 800ms minimum after V
CC
rises above the
reset threshold. An external pull-up resistor is needed.
Active HIGH reset output. RESET remains HIGH while V
CC
is below the
reset threshold and for 800ms after V
CC
rises above the reset threshold.
Manual reset input. A negative going edge transition on MR asserts reset.
Reset remains asserted for one reset time-out period (800 ms min). This
-
2
RESET
3
3
MR
active-LOW input has an internal pull-up resistor. It can be driven from a
TTL or CMOS logic line or shorted to ground with a switch. Leave open if
unused.
4
4
V
CC
Power supply input voltage.
Manual Reset
The ASM161/162 have a unique manual reset circuit. A
negative going edge transition on MR initiates the reset.
A manual reset generates a single reset pulse of fixed
length. The output-reset pulse remains asserted for the
Reset Active Time-Out Period t
RP
and then clears. Once
the reset pulse is completed, the MR input remains
disabled for at least 49µS but not more than 122µS. This
period is specified as t
MRD
.
During the MR disabled period, the microcontroller is
guaranteed a time period free of new manual reset
signals. This period can be used to refresh critical DRAM
contents or other system tasks.
The MR pin must be taken HIGH and LOW again after
the t
MRD
period has been completed to initiate another
reset pulse.
The manual reset input has an internal 20kΩ pull-up
resistor. MR can be left open if not used.
Detailed Description
The reset function ensures the microprocessor is properly
reset and powers up into a known condition after a power
failure.
Reset Timing
A reset is generated whenever the supply voltage is
below the threshold level (V
CC
< V
TH
). The reset duration
is at least 800ms after V
CC
has risen above the reset
threshold and is guaranteed to be no more than
2 seconds. The rest signal remains active as long as the
monitored supply voltage is below the internal threshold
voltage.
The ASM161 has an open-drain, active LOW RESET
output (which is guaranteed to be in the correct state for
V
CC
down to 1.1 V). The ASM161 uses an external pull-
up resistor. Output leakage current is under 1µA. A high
resistance value can be used to minimize current drain.
The ASM162 generates an active-HIGH RESET output.
Part Number
ASM161
ASM162
Reset Polarity
LOW (use external pull-up resistor)
HIGH
µP Supervisory Circuit
Notice: The information in this document is subject to change without notice.
3 of 9
April 2008
rev 1.5
ASM161/ASM162
Application Information
Glitch Resistance
The ASM161/162 are relatively immune to short duration
negative-going V
CC
transients/glitches. A V
CC
transient
that goes 100mV below the reset threshold and lasts 20s
or less will not typically cause a reset pulse.
Valid Reset with V
CC
under 1.1V
To ensure that logic inputs connected to the ASM162
RESET pin are in a known state when V
CC
is under 1.1V,
a 100kΩ pull-down resistor at RESET is needed. The
value is not critical.
This scheme does not work with the open-drain outputs
of ASM161.
Absolute Maximum Ratings
Parameter
Pin Terminal Voltage with Respect to Ground
V
CC
RESET, RESET and MR
Input Current at V
CC
and MR
Rate of Rise at V
CC
Power Dissipation (T
A
= 70°C)
Operating Temperature Range
Storage Temperature Range
Lead Temperature (soldering, 10 sec)
ESD rating
HBM
MM
2
200
KV
V
-40
-65
-0.3
-0.3
6.0
V
CC
+ 0.3
20
100
320
85
160
300
V
V
mA
V/µs
mW
°C
°C
°C
Min
Max
Unit
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability.
µP Supervisory Circuit
Notice: The information in this document is subject to change without notice.
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April 2008
rev 1.5
Electrical Characteristics
ASM161/ASM162
Unless otherwise noted, V
CC
is over the full range and T
A
= 0
°c
to 70
°c
for ASM161/162 X C and T
A
= -40
°c
to +85
°c
for ASM161/162 X E devices. Typical
values at T
A
= 25
°c
, V
CC
= 5V for L/M/J devices, V
CC
= 3.3V for T/S devices and V
CC
= 3V for R devices
Parameter
Input Voltage (V
CC
)
Range
Supply Current
(Unloaded)
Symbol
V
CC
I
CC
L Devices
M devices
J devices
Conditions
T
A
= 0°C to 70°C
V
CC
< 5.5V L/M/J
V
CC
< 3.6V R/S/T
T
A
= 25°C
Note 1
T
A
= 25°C
Note 1
T
A
= 25°C
Note 1
T
A
= 25°C
Note 1
T
A
= 25°C
Note 1
T
A
= 25°C
Note 1
Min
1.1
TYP
Max
5.5
15
Unit
V
µA
6
4.5
4.63
4.38
4.00
3.08
2.93
2.63
30
Reset Threshold
V
TH
T devices
S devices
R devices
4.56
4.50
4.31
4.25
3.93
3.89
3.04
3.00
2.89
2.85
2.59
2.55
10
4.70
4.75
4.45
4.50
4.06
4.10
3.11
3.15
2.96
3.00
2.66
2.70
V
Reset Threshold
Temp Coefficient
V
CC
to reset delay
Reset Pulse Width
MR Minimum Pulse
Width
MR Glitch Immunity
MR to RESET
Propagation Delay
MR Input Threshold
T
CVTH
V
CC
= V
TH
to (V
TH
-100mV)
T
A
= 0°C to 70°C
T
A
= -40°C to 85°C
800
600
10
t
RPW
t
MR
20
1400
ppm/
°C
µS
2000
2240
ms
µS
100
0.5
V
IH
V
IL
V
IH
V
IL
t
MRD
V
CC
> V
TH
(MAX), L/M/J devices
V
CC
> V
TH
(MAX), R/S/T devices
T
A
= 0°C to 70°C
T
A
= -40°C to 85°C
10
V
CC
=V
TH
min., I
SINK
=1.2mA,
ASM161 R/S/T
V
CC
=V
TH
min., I
SINK
=3.2mA,
ASM161L/M/J
V
CC
> 1.1, I
SINK
= 50µA
V
CC
=V
TH
max., I
SINK
=1.2mA,
ASM162 R/S/T
V
CC
=V
TH
max., I
SINK
=3.2mA,
ASM162 L/M/J
1.8<V
CC
<V
TH
min., I
SOURCE
= 150 µA
V
DRAIN
< 6.0V, 0°C < T
A
< 70°C
0.8V
CC
1
2.3
0.8
0.7V
CC
48
85
85
20
30
0.3
0.4
0.3
0.3
0.25V
CC
122
ns
µS
V
V
V
V
µS
KΩ
MR Delay to MR
Retrigger
MR pull-up resistance
Low RESET output
voltage (ASM161)
V
OL
V
RESET Output
Voltage (ASM162)
HIGH RESET Output
Voltage (ASM162)
RESET Output
Leakage Current
(ASM161)
V
OL
V
0.4
V
µA
V
OH
I
LKG
Notes: 1. Over operating temperature range.
µP Supervisory Circuit
Notice: The information in this document is subject to change without notice.
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