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CD-700-DAE-KFNN-45M1584000

Description
Phase Locked Loop, CQCC16, SMD-16
CategoryAnalog mixed-signal IC    The signal circuit   
File Size1010KB,12 Pages
ManufacturerVectron International, Inc.
Websitehttp://www.vectron.com/
Environmental Compliance
Download Datasheet Parametric View All

CD-700-DAE-KFNN-45M1584000 Overview

Phase Locked Loop, CQCC16, SMD-16

CD-700-DAE-KFNN-45M1584000 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerVectron International, Inc.
package instructionQCCN, LCC16,.2X.3,40
Reach Compliance Codecompliant
Analog Integrated Circuits - Other TypesPHASE LOCKED LOOP
JESD-30 codeR-CQCC-N16
JESD-609 codee4
length7.49 mm
Humidity sensitivity level1
Number of functions1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Encapsulate equivalent codeLCC16,.2X.3,40
Package shapeRECTANGULAR
Package formCHIP CARRIER
Maximum seat height2.13 mm
Maximum supply current (Isup)63 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceGold (Au) - with Nickel (Ni) barrier
Terminal formNO LEAD
Terminal pitch1.02 mm
Terminal locationQUAD
width5.08 mm
CD-700
Complete VCXO Based Phase Lock Loop
CD-700
Description
The VI CD-700 is a user-con gurable crystal based PLL integrated circuit. It includes a digital phase detector, op-amp, VCXO
and additional integrated functions for use in digital synchronization applications. Loop lter software is available as well SPICE
models for circuit simulation.
Features
5 x 7.5 x 2 mm, smallest VCXO PLL available
Output Frequencies to 77.76 MHz
5.0 or 3.3 Vdc operation
Tri-State Output
Holdover on Loss of Signal Alarm
VCXO with CMOS outputs
0/70 or –40/85 C temperature range
Hermetically sealed ceramic SMD package
Product is compliant to RoHS directive
Applications
Frequency Translation
Clock Smoothing, Clock Switching
NRZ Clock recovery
DSLAM, ADM, ATM, Aggregation, Optical Switching/Routing,
Base Station
Synchronous Ethernet
Low jitter PLL’s
Block Diagram
LOS
(8)
PHO OPN
(3)
(2)
OPOUT VC
(1)
(16)
LOSIN
(4)
DATAIN
(5)
CLKIN
(6)
Phase Detector and
LOS
VCXO
OUT1
(13)
Optional 2nd divider
OUT2
(11)
RCLK
(9)
RDATA
(10)
OPP
(15)
GND VDD
(7) (14)
HIZ
(12)
Page 1 of 12
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com

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