PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
Rev. 08 — 23 August 2010
Product data sheet
1. General description
The PCA2000 and PCA2001 are CMOS integrated circuits for battery operated wrist
watches with a 32 kHz quartz crystal as timing element and a bipolar 1 Hz stepping motor.
The quartz crystal oscillator and the frequency divider are optimized for minimum power
consumption. A timing accuracy of 1 ppm is achieved with a programmable, digital
frequency adjustment.
To obtain the minimum overall power consumption for the watch, an automatic motor
pulse adaptation function is provided. The circuit supplies only the minimum drive current,
which is necessary to ensure a correct motor step. Changing the drive current of the
motor is achieved by chopping the motor pulse with a variable duty cycle. The pulse width
and the range of the variable duty cycle can be programmed to suit different types of
motors. The automatic pulse adaptation scheme is based on a safe dynamic detection of
successful motor steps.
A pad RESET is provided (used for stopping the motor) for accurate time setting and for
accelerated testing of the watch.
The PCA2000 has a battery End Of Life (EOL) warning function. If the battery voltage
drops below the EOL threshold voltage (which can be programmed for silver oxide or
lithium batteries), the motor steps change from one pulse per second to a burst of four
pulses every 4 seconds.
The PCA2001 uses the same circuit as the PCA2000, but without the EOL function.
2. Features and benefits
Amplitude-regulated 32 kHz quartz crystal oscillator, with excellent frequency stability
and high immunity to leakage currents
Electrically programmable time calibration with 1 ppm resolution stored in One Time
Programmable (OTP) memory
The quartz crystal is the only external component connected
Very low power consumption, typical 90 nA
One second output pulses for bipolar stepping motor
Minimum power consumption for the entire watch, due to self adaptation of the motor
drive according to the required torque
Reliable step detection circuit
Motor pulse width, pulse modulation, and pulse adaptation range programmable in a
wide range, stored in OTP memory
Stop function for accurate time setting and power saving during shelf life
NXP Semiconductors
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
End Of Life (EOL) indication for silver oxide or lithium battery (only the PCA2000 has
the EOL feature)
Test mode for accelerated testing of the mechanical parts of the watch and the IC
Test bits for type recognition
3. Applications
Driver circuits for bipolar stepping motors
High immunity motor drive circuits
4. Ordering information
Table 1.
Ordering information
Package
Name
PCA2000U/AC/1
PCA2001U/AC/1
PCA200xU
PCA200xU
Description
wire bond die; 8 bonding pads;
1.16
×
0.86
×
0.22 mm
wire bond die; 8 bonding pads;
1.16
×
0.86
×
0.22 mm
wire bond die; 8 bonding pads;
1.16
×
0.86
×
0.22 mm
wire bond die; 8 bonding pads;
1.16
×
0.86
×
0.22 mm
wafer level chip-size package;
8 bumps
wafer level chip-size package;
8 bumps
wafer level chip-size package;
8 bumps
Delivery form
chip in tray
chip in tray
chip on film frame carrier
chip on film frame carrier
unsawn wafer with lead free
solder bumps
unsawn wafer with lead free
solder bumps
sawn wafer with lead free
solder bumps on Film Frame
Carrier (FFC)
Version
PCA200xU
PCA200xU
PCA200xU
PCA200xU
PCA200xCX
PCA200xCX
PCA200xCX
Type number
PCA2000U/10AC/1 PCA200xU
PCA2001U/10AC/1 PCA200xU
PCA2000CX8/5/1
PCA2001CX8/5/1
PCA200xCX
PCA200xCX
PCA2000CX8/12/1 PCA200xCX
PCA2000_2001
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 08 — 23 August 2010
2 of 30
NXP Semiconductors
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
5. Block diagram
8 kHz
OSCIN
OSCOUT
3
4
OSCILLATOR
32 Hz
DIVIDER
RESET
8
RESET
÷4
TIMING ADJUSTMENT,
INHIBITION
5
1
VOLTAGE DETECTOR,
OTP-CONTROLLER
OTP-MEMORY
1 Hz
reset
V
DD
V
SS
EOL
PCA2000 only
i.c.
2
MOTOR CONTROL WITH
ADAPTIVE PULSE MODULATION
PCA2000
PCA2001
6
STEP
DETECTION
7
mgw567
MOT1
MOT2
Fig 1.
Block diagram of PCA2000 and PCA2001
6. Pinning information
6.1 Pinning
PCA200xU
V
SS
i.c.
1
2
x
0
OSCIN
OSCOUT
3
4
0
y
6
5
001aai177
PCA200xCX
8
7
RESET
MOT2
V
SS
i.c.
1
2
x
0
MOT1
V
DD
OSCIN
OSCOUT
3
4
0
y
6
5
001aai176
8
7
RESET
MOT2
MOT1
V
DD
a. Top view. For mechanical details, see
Figure 13.
Fig 2.
b. Top view. For mechanical details, see
Figure 14.
Pad and bump configuration of PCA2000 and PCA2001
PCA2000_2001
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 08 — 23 August 2010
3 of 30
NXP Semiconductors
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
6.2 Pin description
Table 2.
Symbol
V
SS
i.c.
OSCIN
OSCOUT
V
DD
MOT1
MOT2
RESET
Pin description
Pin
1
2
3
4
5
6
7
8
Description
ground
internally connected
oscillator input
oscillator output
supply voltage
motor 1 output
motor 2 output
reset input
7. Functional description
7.1 Motor pulse
The motor output supplies pulses of different driving stages, depending on the torque
required to turn on the motor. The number of different stages can be selected between
three and six. With the exception of the highest driving stage, each motor pulse (t
p
in
Figure 3
and
Figure 6)
is followed by a detection phase during which the motor movement
is monitored, in order to check whether the motor has turned correctly or not.
1.96 ms
t
p
detection phase
t
p
2t
p
mgw350
0.98 ms
31.25 ms
31.25 ms
Fig 3.
Correction sequence after failed motor step
If a missing step is detected, a correction sequence is generated (see
Figure 3)
and the
driving stage is switched to the next level. The correction sequence consists of two
pulses: first a short pulse in the opposite direction (0.98 ms, modulated with the maximum
duty cycle) to give the motor a defined position, followed by a motor pulse of the strongest
driving level. Every 4 minutes, the driving level is lowered again by one stage.
The motor pulse has a constant pulse width. The driving level is regulated by chopping the
driving pulse with a variable duty cycle. The driving level starts from the programmed
minimum value and increases by 6.25 % after each failed motor step. The strongest
driving stage, which is not followed by a detection phase, is programmed separately.
PCA2000_2001
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 08 — 23 August 2010
4 of 30
NXP Semiconductors
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
Therefore it is possible to program a larger energy gap between the pulses with step
detection and the strongest, not monitored, pulse. This might be necessary to ensure a
reliable and stable operation under adverse conditions (magnetic fields and vibrations). If
the watch works in the highest driving stage, the driving level jumps after the 4-minute
period directly to the lowest stage, and not just one stage lower.
To optimize the performance for different motors, the following parameters can be
programmed:
•
•
•
•
•
Pulse width: 0.98 ms to 7.8 ms in steps of 0.98 ms
Duty cycle of lowest driving level: 37.5 % to 56.25 % in steps of 6.25 %
Number of driving levels (including the highest driving level): 3 to 6
Duty cycle of the highest driving level: 75 % or 100 %
Enlargement pulse for the highest driving level: on or off
The enlargement pulse has a duty cycle of 25 % and a pulse width which is twice the
programmed motor pulse width. The repetition period for the chopping pattern is 0.98 ms.
Figure 4
shows an example of a 3.9 ms pulse.
DUTY CYCLE
37.5 %
0.244 ms
0.122 ms
43.75 %
50 %
56.25 %
62.5 %
68.75 %
75 %
81.25 %
100 %
0.98 ms
0.98 ms
0.98 ms
0.98 ms
mgw351
Fig 4.
Possible modulations for a 3.9 ms motor pulse
PCA2000_2001
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 08 — 23 August 2010
5 of 30
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