Automotive PWM DC/DC Voltage Controller
ISL78210
The ISL78210 IC is a Single-Phase Synchronous-Buck
PWM voltage controller featuring Intersil’s Robust Ripple
Regulator (R
3
™) Technology. The ISL78210 provides a
low cost solution for compact high performance
applications.The wide 3.3V to 25V input voltage range is
ideal for systems that run on battery or AC adapter
power sources. Resistor programmed output voltage
setpoint and capacitor programmed soft-start delay allow
for fast and easy implementation. Robust integrated
MOSFET drivers and Schottky bootstrap diode reduce the
implementation area and lower component cost.
Intersil’s R
3
Technology™ combines the best features of
both fixed-frequency and hysteretic PWM control. The
PWM frequency is 300kHz during static operation,
becoming variable during changes in load, setpoint
voltage, and input voltage when changing between
battery and AC adapter power. The modulators ability to
change the PWM switching frequency during these
events in conjunction with external loop compensation
produces superior transient response. For maximum
efficiency, the converter automatically enters
diode-emulation mode (DEM) during light-load conditions
such as system standby.
ISL78210
Features
• Input Voltage Range: 3.3V to 25V
• Output Voltage Range: 0.5V to 3.3V
• Output Load to 30A
• Simple Resistor Programming for Output Voltage
• ±0.75% System Accuracy: -40°C to +105°C
• Capacitor Programming for Soft-Start Delay
• Fixed 300kHz PWM Frequency in Continuous
Conduction
• External Compensation Affords Optimum Control Loop
Tuning
• Automatic Diode Emulation Mode for Highest
Efficiency
• Integrated High-Current MOSFET Drivers and
Schottky Boot-Strap Diode for Optimal Efficiency
• Choice of Overcurrent Detection Schemes
- Lossless Inductor DCR Current Sensing
- Precision Resistive Current Sensing
• Power-Good Monitor for Soft-Start and Fault
Detection
• Fault Protection
- Undervoltage
- Overvoltage
- Overcurrent (DCR-Sense or Resistive-Sense
Capability)
- Over-Temperature Protection
- Fault Identification by PGOOD Pull-Down
Resistance
• TS16949 Compliant
• Fully AEC-Q100 tested
• Pb-Free (RoHS Compliant)
Pin Configuration
ISL78210
(16 LD 2.6X1.8 µTQFN)
TOP VIEW
16 PGND
15 LGATE
14 PVCC
13 VCC
12 BOOT
11 UGATE
10 PHASE
9 OCSET
PGOOD 6
FB 7
VO 8
GND 1
EN 2
NC 3
SREF 4
NC 5
Applications*
(see page 16)
• Automotive PC Graphical Processing Unit VCC Rail
• Automotive PC I/O Controller Hub (ICH) VCC Rail
• Automotive PC Memory Controller Hub (GMCH) VCC
Rail
March 8, 2010
FN7583.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL78210
Pin Descriptions
PIN
1
2
3, 5
4
6
SYMBOL
GND
EN
NC
SREF
PGOOD
DESCRIPTION
IC ground for bias supply and signal reference.
Enable input for the IC. Pulling EN above the VENTHR rising threshold voltage initializes
the soft-start sequence.
No internal connection. Pins 3 and 5 should be connected to the GND pin.
Soft-start programming capacitor input. Connects internally to the inverting input of the
VSET voltage setpoint amplifier.
Power-good open-drain indicator output. This pin changes to high impedance when the
converter is able to supply regulated voltage. The pull-down resistance between the
PGOOD pin and the GND pin identifies which protective fault has shut down the regulator.
See Table 1 on page 10.
Voltage feedback sense input. Connects internally to the inverting input of the
control-loop error amplifier. The converter is in regulation when the voltage at the FB pin
equals the voltage on the SREF pin. The control loop compensation network connects
between the FB pin and the converter output. See Figure 8 on page 11.
Output voltage sense input for the R3 modulator. The VO pin also serves as the reference
input for the overcurrent detection circuit. See Figure 5 on page 7.
Input for the overcurrent detection circuit. The overcurrent setpoint programming
resistor ROCSET connects from this pin to the sense node. See “OVERCURRENT
PROGRAMMING CIRCUIT” on page 7.
Return current path for the UGATE high-side MOSFET driver. VIN sense input for the R3
modulator. Inductor current polarity detector input. Connect to junction of output
inductor, high-side MOSFET, and low-side MOSFET. See “Application Schematics” on
page 4 (Figures 2 and 3).
High-side MOSFET gate driver output. Connect to the gate terminal of the high-side
MOSFET of the converter.
Positive input supply for the UGATE high-side MOSFET gate driver. The BOOT pin is
internally connected to the cathode of the Schottky boot-strap diode. Connect an MLCC
between the BOOT pin and the PHASE pin.
Input for the IC bias voltage. Connect +5V to the VCC pin and decouple with at least a
1µF MLCC to the GND pin. See “Application Schematics” on page 4 (Figures 2 and 3).
Input for the LGATE and UGATE MOSFET driver circuits. The PVCC pin is internally
connected to the anode of the Schottky boot-strap diode. Connect +5V to the PVCC pin
and decouple with a 10µF MLCC to the PGND pin. See “Application Schematics” on page 4
(Figures 2 and 3).
Low-side MOSFET gate driver output. Connect to the gate terminal of the low-side
MOSFET of the converter.
Return current path for the LGATE MOSFET driver. Connect to the source of the low-side
MOSFET.
7
FB
8
9
VO
OCSET
10
PHASE
11
12
UGATE
BOOT
13
14
VCC
PVCC
15
16
LGATE
PGND
Ordering Information
PART NUMBER
(Notes 2, 3)
1. ISL78210ARUZ-T (Note 1) GAT
PART
MARKING
TEMP RANGE
(°C)
-40 to +105
PACKAGE
Tape & Reel
(Pb-Free)
16 Ld 2.6x1.8 µTQFN
PKG.
DWG. #
L16.2.6x1.8A
1. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach
materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL78210.
For more information on MSL please
see techbrief
TB363.
2
FN7583.0
March 8, 2010
Block Diagram
EN
VCC
100kΩ
POR
FB
−
EA
+
V
COMP
FAULT
100pF
H
L
IN
RUN
RUN
PWM
DRIVER
BOOT
UGATE
PHASE
PVCC
3
V
W
+
−
VSET
SREF
−
OVP
+
FB
−
UVP
+
VREF
GND
500mV
FN7583.0
March 8, 2010
OTP
PWM
SHOOT-THROUGH
PROTECTION
RUN
VCC
g
m
V
IN
DRIVER
LGATE
PGND
+
−
ISL78210
ISL78210
C
r
V
R
+
g
m
V
O
−
−
OCP
+
FAULT
I
OCSET
10µF
VO
OCSET
PGOOD
FIGURE 1. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM OF ISL78210
ISL78210
Application Schematics
R
VCC
+5V
C
PVCC
LGATE
PGND
PVCC
C
VCC
VIN
3.3V TO 25V
VCC
CIN
C
BOOT
UGATE
PHASE
R
OCSET
OCSET
C
BOOT
Q
LS
Q
HS
L
O
VOUT
0.5V TO 3.3V
CO
C
C
OCSET
CO
B
CIN
B
16
15
14
7
FB
GND
EN
GPIO
NC
SREF
1
2
3
4
5
6
PGOOD
NC
VO
8
13
12
11
10
9
R
O
R
COMP
C
COMP
C
SOFT
VCC
R
PGOOD
R
OFS
R
FB
GPIO
FIGURE 2. ISL78210 APPLICATION SCHEMATIC WITH DCR CURRENT SENSE
R
VCC
+5V
C
PVCC
LGATE
PGND
PVCC
C
VCC
VIN
3.3V TO 25V
VCC
CIN
C
BOOT
UGATE
PHASE
OCSET
C
BOOT
Q
LS
Q
HS
L
O
R
SNS
VOUT
0.5V TO 3.3V
CO
C
C
OCSET
CO
B
CIN
B
16
15
14
GND
EN
GPIO
NC
SREF
1
2
3
4
5
6
7
13
12
11
10
9
8
PGOOD
NC
FB
VO
R
OCSET
R
O
R
COMP
C
COMP
C
SOFT
VCC
R
PGOOD
R
OFS
R
FB
GPIO
FIGURE 3. ISL78210 APPLICATION SCHEMATIC WITH RESISTOR CURRENT SENSE
4
FN7583.0
March 8, 2010
ISL78210
Absolute Maximum Ratings
VCC, PVCC, PGOOD to GND . . . . . . . . . . . . . -0.3V to +7.0V
VCC, PVCC to PGND . . . . . . . . . . . . . . . . . . -0.3V to +7.0V
GND to PGND . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
EN, VO, FB, OCSET, SREF . . . . . . . -0.3V to GND, VCC +0.3V
BOOT Voltage (V
BOOT-GND
) . . . . . . . . . . . . . . . -0.3V to 33V
BOOT To PHASE Voltage (V
BOOT-PHASE
) . . . -0.3V to 7V (DC)
-0.3V to 9V (<10ns)
PHASE Voltage . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 28V
GND -8V (<20ns Pulse Width, 10µJ)
UGATE Voltage . . . . . . . . . . . . V
PHASE
- 0.3V (DC) to V
BOOT
V
PHASE
- 5V (<20ns Pulse Width, 10µJ) to V
BOOT
LGATE Voltage . . . . . . . . . . GND - 0.3V (DC) to
VCC
+ 0.3V
GND - 2.5V (<20ns Pulse Width, 5µJ) to
VCC
+ 0.3V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . 3000V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 250V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . 2000V
Latch Up (Tested per JESD-78A)
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
16 Ld µTQFN Package (Notes 4, 5) .
110
4.3
Junction Temperature Range . . . . . . . . . . -55°C to +150°C
Operating Temperature Range . . . . . . . . . -40°C to +105°C
Storage Temperature . . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . -40°C to +105°C
Converter Input Voltage to GND . . . . . . . . . . . . 3.3V to 25V
VCC, PVCC to GND . . . . . . . . . . . . . . . . . . . . . . . . 5V ±5%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTE:
4.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
5. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
These specifications apply for T
A
= -40°C to +105°C, unless otherwise stated. All typical
specifications T
A
= +25°C, VCC = 5V.
Boldface limits apply over the operating
temperature range, -40°C to +105°C.
SYMBOL
I
VCC
I
VCCoff
I
PVCCoff
V
VCC_THR
V
VCC_THF
PARAMETER
VCC and PVCC
VCC Input Bias Current
VCC Shutdown Current
PVCC Shutdown Current
VCC POR THRESHOLD
Rising VCC POR Threshold Voltage
Falling VCC POR Threshold Voltage
REGULATION
Reference Voltage
System Accuracy
PWM
Switching Frequency
VO
VO Input Voltage Range
VO Input Impedance
VO Reference Offset Current
VO Input Leakage Current
ERROR AMPLIFIER
FB Input Bias Current
SREF
SREF Voltage
Soft-Start Current
TEST CONDITIONS
EN = 5V, VCC = 5V, FB = 0.55V, SREF<FB
EN = GND, VCC = 5V
EN = GND, PVCC = 5V
MIN
MAX
(Note 6) TYP (Note 6) UNIT
-
-
-
4.37
4.10
-
1.1
0.1
0.1
4.49
4.22
0.50
-
300
-
600
10
.1
-
0.5
20
1.5
1.0
1.0
4.60
4.35
-
+0.75
330
3.6
-
-
-
+50
-
30
mA
µA
µA
V
V
V
%
kHz
V
kΩ
µA
µA
nA
V
µA
V
REF(int)
PWM Mode = CCM
F
SW
V
VO
R
VO
I
VOSS
I
VOoff
I
FB
V
SREF
I
SS
EN = 5V
V
ENTHR
< EN, SREF = Soft-Start Mode
EN = GND, VO = 3.6V
EN = 5V, FB = 0.50V
PWM Mode = CCM
-0.75
270
0
-
-
-
-20
-
10
5
FN7583.0
March 8, 2010
Talking
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