FUJITSU SEMICONDUCTOR
DATA SHEET
DS702-00003-1v0-E
8-bit Microcontrollers
CMOS
New-8FX MB95560H/570H/580H Series
MB95F562H/F562K/F563H/F563K/F564H/F564K
MB95F572H/F572K/F573H/F573K/F574H/F574K
MB95F582H/F582K/F583H/F583K/F584H/F584K
■
DESCRIPTION
MB95560H/570H/580H is a series of general-purpose, single-chip microcontrollers. In addition to a compact
instruction set, the microcontrollers of these series contain a variety of peripheral resources.
■
FEATURES
• New-8FX CPU core
Instruction set optimized for controllers
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instructions
• Bit manipulation instructions, etc.
• Clock
• Selectable main clock source
Main oscillation clock (up to 16.25 MHz, maximum machine clock frequency: 8.125 MHz)
External clock (up to 32.5 MHz, maximum machine clock frequency: 16.25 MHz)
Main CR clock (4 MHz
±
2%)
The main CR clock frequency becomes 8 MHz when the PLL multiplier is 2.
The main CR clock frequency becomes 10 MHz when the PLL multiplier is 2.5.
The main CR clock frequency becomes 12 MHz when the PLL multiplier is 3.
The main CR clock frequency becomes 16 MHz when the PLL multiplier is 4.
• Selectable subclock source
Sub-oscillation clock (32.768 kHz)
External clock (32.768 kHz)
Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
• Timer
• 8/16-bit composite timer
×
2 channels
• Time-base timer
×
1 channel
• Watch prescaler
×
1 channel
• LIN-UART (available only on MB95F562H/F562K/F563H/F563K/F564H/F564K/F582H/F582K/F583H/
F583K/F584H/F584K)
• Full duplex double buffer
• Capable of clock-synchronized serial data transfer and clock-asynchronized serial data transfer
(Continued)
For the information for microcontroller supports, see the following website.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2010.12
MB95560H/570H/580H Series
(Continued)
• External interrupt
• Interrupt by edge detection (rising edge, falling edge, and both edges can be selected)
• Can be used to wake up the device from different low power consumption (standby) modes
• 8/10-bit A/D converter
• 8-bit or 10-bit resolution can be selected.
• Low power consumption (standby) modes
• Stop mode
• Sleep mode
• Watch mode
• Time-base timer mode
• I/O port
• MB95F562H/F563H/F564H (maximum no. of I/O ports: 16)
General-purpose I/O ports (N-ch open drain)
:1
General-purpose I/O ports (CMOS I/O)
: 15
• MB95F562K/F563K/F564K (maximum no. of I/O ports: 17)
General-purpose I/O ports (N-ch open drain)
:2
General-purpose I/O ports (CMOS I/O)
: 15
• MB95F572H/F573H/F574H (maximum no. of I/O ports: 4)
General-purpose I/O ports (N-ch open drain)
:1
General-purpose I/O ports (CMOS I/O)
:3
• MB95F572K/F573K/F574K (maximum no. of I/O ports: 5)
General-purpose I/O ports (N-ch open drain)
:2
General-purpose I/O ports (CMOS I/O)
:3
• MB95F582H/F583H/F584H (maximum no. of I/O ports: 12)
General-purpose I/O ports (N-ch open drain)
:1
General-purpose I/O ports (CMOS I/O)
: 11
• MB95F582K/F583K/F584K (maximum no. of I/O ports: 13)
General-purpose I/O ports (N-ch open drain)
:2
General-purpose I/O ports (CMOS I/O)
: 11
• On-chip debug
• 1-wire serial control
• Serial writing supported (asynchronous mode)
• Hardware/software watchdog timer
• Built-in hardware watchdog timer
• Built-in software watchdog timer
• Low-voltage detection reset circuit (available only on MB95F562K/F563K/F564K/F572K/F573K/F574K/
F582K/F583K/F584K)
• Built-in low-voltage detector
• Clock supervisor counter
• Built-in clock supervisor counter function
• Dual operation Flash memory
• The erase/write operation and the read operation can be executed in different banks (upper bank/lower
bank) simultaneously.
• Flash memory security function
• Protects the content of the Flash memory
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DS702-00003-1v0-E
MB95560H/570H/580H Series
■
PRODUCT LINE-UP
• MB95560H Series
Part number
MB95F562H
Parameter
MB95F563H
MB95F564H
MB95F562K
MB95F563K
MB95F564K
Type
Flash memory product
Clock
supervisor
It supervises the main clock oscillation.
counter
Flash memory
8 Kbyte
12 Kbyte
20 Kbyte
8 Kbyte
12 Kbyte
20 Kbyte
capacity
RAM capacity
240 bytes
496 bytes
496 bytes
240 bytes
496 bytes
496 bytes
Low-voltage
No
Yes
detection reset
Reset input
Dedicated
Selected through software
• Number of basic instructions
: 136
• Instruction bit length
: 8 bits
• Instruction length
: 1 to 3 bytes
CPU functions
• Data bit length
: 1, 8 and 16 bits
• Minimum instruction execution time : 61.5 ns (machine clock frequency = 16.25 MHz)
• Interrupt processing time
: 0.6 µs (machine clock frequency = 16.25 MHz)
• I/O ports (Max) : 17
• I/O ports (Max) : 16
General-
• CMOS I/O
: 15
• CMOS I/O
: 15
purpose I/O
• N-ch open drain: 1
• N-ch open drain: 2
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
Hardware/
• Reset generation cycle
software
- Main oscillation clock at 10 MHz: 105 ms (Min)
watchdog timer • The sub-CR clock can be used as the source clock of the hardware watchdog timer.
Wild register
It can be used to replace 3 bytes of data.
• A wide range of communication speed can be selected by a dedicated reload timer.
• It has a full duplex double buffer.
LIN-UART
• Clock-synchronized serial data transfer and clock-asynchronized serial data transfer is en-
abled.
• The LIN function can be used as a LIN master or a LIN slave.
6 channels
8/10-bit A/D
converter
8-bit or 10-bit resolution can be selected.
2 channels
• The timer can be configured as an "8-bit timer
×
2 channels" or a "16-bit timer
×
1 channel".
8/16-bit
• It has built-in timer function, PWC function, PWM function and input capture function.
composite timer
• Count clock: it can be selected from internal clocks (seven types) and external clocks.
• It can output square wave.
6 channels
External
• Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
interrupt
• It can be used to wake up the device from the standby mode.
• 1-wire serial control
On-chip debug
• It supports serial writing (asynchronous mode).
(Continued)
DS702-00003-1v0-E
3
MB95560H/570H/580H Series
(Continued)
Part number
MB95F562H
Parameter
MB95F563H
MB95F564H
MB95F562K
MB95F563K
MB95F564K
Watch prescaler Eight different time intervals can be selected.
• It supports automatic programming (Embedded Algorithm) and write/erase/erase-suspend/
erase-resume commands.
• It has a flag indicating the completion of the operation of Embedded Algorithm.
Flash memory • Flash security feature for protecting the content of the Flash memory
Number of program/erase cycles
Data retention time
1000
20 years
10000
10 years
100000
5 years
Standby mode Sleep mode, stop mode, watch mode, time-base timer mode
LCC-32P-M19
Package
FPT-20P-M09
FPT-20P-M10
4
DS702-00003-1v0-E
MB95560H/570H/580H Series
• MB95570H Series
Part number
MB95F572H
Parameter
MB95F573H
MB95F574H
MB95F572K
MB95F573K
MB95F574K
Type
Flash memory product
Clock
supervisor
It supervises the main clock oscillation.
counter
Flash memory
8 Kbyte
12 Kbyte
20 Kbyte
8 Kbyte
12 Kbyte
20 Kbyte
capacity
RAM capacity
240 bytes
496 bytes
496 bytes
240 bytes
496 bytes
496 bytes
Low-voltage
No
Yes
detection reset
Reset input
Dedicated
Selected through software
• Number of basic instructions
: 136
• Instruction bit length
: 8 bits
• Instruction length
: 1 to 3 bytes
CPU functions
• Data bit length
: 1, 8 and 16 bits
• Minimum instruction execution time : 61.5 ns (machine clock frequency = 16.25 MHz)
• Interrupt processing time
: 0.6 µs (machine clock frequency = 16.25 MHz)
• I/O ports (Max) : 5
• I/O ports (Max) : 4
General-
• CMOS I/O
:3
• CMOS I/O
:3
purpose I/O
• N-ch open drain: 1
• N-ch open drain: 2
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
• Reset generation cycle
Hardware/
- Main oscillation clock at 10 MHz: 105 ms (Min)
software
watchdog timer • The sub-CR clock can be used as the source clock of the hardware watchdog timer.
Wild register
It can be used to replace 3 bytes of data.
LIN-UART
No LIN-UART
2 channels
8/10-bit A/D
converter
8-bit or 10-bit resolution can be selected.
1 channel
• The timer can be configured as an "8-bit timer
×
2 channels" or a "16-bit timer
×
1 channel".
8/16-bit
• It has built-in timer function, PWC function, PWM function and input capture function.
composite timer
• Count clock: it can be selected from internal clocks (seven types) and external clocks.
• It can output square wave.
2 channels
External
• Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
interrupt
• It can be used to wake up the device from standby modes.
• 1-wire serial control
On-chip debug
• It supports serial writing (asynchronous mode).
Watch prescaler Eight different time intervals can be selected.
• It supports automatic programming (Embedded Algorithm) and write/erase/erase-suspend/
erase-resume commands.
• It has a flag indicating the completion of the operation of Embedded Algorithm.
Flash memory • Flash security feature for protecting the content of the Flash memory
Number of program/erase cycles
Data retention time
1000
20 years
10000
10 years
100000
5 years
Standby mode Sleep mode, stop mode, watch mode, time-base timer mode
Package
FPT-8P-M08
DS702-00003-1v0-E
5
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